<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/kernel/cpu/microcode, branch linux-4.16.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.16.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.16.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2018-05-01T19:47:30Z</updated>
<entry>
<title>x86/microcode: Do not exit early from __reload_late()</title>
<updated>2018-05-01T19:47:30Z</updated>
<author>
<name>Borislav Petkov</name>
</author>
<published>2018-04-21T08:19:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c6a3a884fdfd1f92c9fde05d72ed1b66974a27f3'/>
<id>urn:sha1:c6a3a884fdfd1f92c9fde05d72ed1b66974a27f3</id>
<content type='text'>
commit 09e182d17e8891dd73baba961a0f5a82e9274c97 upstream.

Vitezslav reported a case where the

  "Timeout during microcode update!"

panic would hit. After a deeper look, it turned out that his .config had
CONFIG_HOTPLUG_CPU disabled which practically made save_mc_for_early() a
no-op.

When that happened, the discovered microcode patch wasn't saved into the
cache and the late loading path wouldn't find any.

This, then, lead to early exit from __reload_late() and thus CPUs waiting
until the timeout is reached, leading to the panic.

In hindsight, that function should have been written so it does not return
before the post-synchronization. Oh well, I know better now...

Fixes: bb8c13d61a62 ("x86/microcode: Fix CPU synchronization routine")
Reported-by: Vitezslav Samel &lt;vitezslav@samel.cz&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Vitezslav Samel &lt;vitezslav@samel.cz&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20180418081140.GA2439@pc11.op.pod.cz
Link: https://lkml.kernel.org/r/20180421081930.15741-2-bp@alien8.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>x86/microcode/intel: Save microcode patch unconditionally</title>
<updated>2018-05-01T19:47:30Z</updated>
<author>
<name>Borislav Petkov</name>
</author>
<published>2018-04-21T08:19:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=166e0b4343baa1d3bf27ef1649d8f58c589af5b1'/>
<id>urn:sha1:166e0b4343baa1d3bf27ef1649d8f58c589af5b1</id>
<content type='text'>
commit 84749d83758af6576552046b215b9b7f37f9556b upstream.

save_mc_for_early() was a no-op on !CONFIG_HOTPLUG_CPU but the
generic_load_microcode() path saves the microcode patches it has found into
the cache of patches which is used for late loading too. Regardless of
whether CPU hotplug is used or not.

Make the saving unconditional so that late loading can find the proper
patch.

Reported-by: Vitezslav Samel &lt;vitezslav@samel.cz&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Vitezslav Samel &lt;vitezslav@samel.cz&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/20180418081140.GA2439@pc11.op.pod.cz
Link: https://lkml.kernel.org/r/20180421081930.15741-1-bp@alien8.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>x86/microcode: Fix CPU synchronization routine</title>
<updated>2018-03-16T19:55:51Z</updated>
<author>
<name>Borislav Petkov</name>
</author>
<published>2018-03-14T18:36:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bb8c13d61a629276a162c1d2b1a20a815cbcfbb7'/>
<id>urn:sha1:bb8c13d61a629276a162c1d2b1a20a815cbcfbb7</id>
<content type='text'>
Emanuel reported an issue with a hang during microcode update because my
dumb idea to use one atomic synchronization variable for both rendezvous
- before and after update - was simply bollocks:

  microcode: microcode_reload_late: late_cpus: 4
  microcode: __reload_late: cpu 2 entered
  microcode: __reload_late: cpu 1 entered
  microcode: __reload_late: cpu 3 entered
  microcode: __reload_late: cpu 0 entered
  microcode: __reload_late: cpu 1 left
  microcode: Timeout while waiting for CPUs rendezvous, remaining: 1

CPU1 above would finish, leave and the others will still spin waiting for
it to join.

So do two synchronization atomics instead, which makes the code a lot more
straightforward.

Also, since the update is serialized and it also takes quite some time per
microcode engine, increase the exit timeout by the number of CPUs on the
system.

That's ok because the moment all CPUs are done, that timeout will be cut
short.

Furthermore, panic when some of the CPUs timeout when returning from a
microcode update: we can't allow a system with not all cores updated.

Also, as an optimization, do not do the exit sync if microcode wasn't
updated.

Reported-by: Emanuel Czirai &lt;xftroxgpx@protonmail.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Emanuel Czirai &lt;xftroxgpx@protonmail.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Link: https://lkml.kernel.org/r/20180314183615.17629-2-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode: Attempt late loading only when new microcode is present</title>
<updated>2018-03-16T19:55:51Z</updated>
<author>
<name>Borislav Petkov</name>
</author>
<published>2018-03-14T18:36:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2613f36ed965d0e5a595a1d931fd3b480e82d6fd'/>
<id>urn:sha1:2613f36ed965d0e5a595a1d931fd3b480e82d6fd</id>
<content type='text'>
Return UCODE_NEW from the scanning functions to denote that new microcode
was found and only then attempt the expensive synchronization dance.

Reported-by: Emanuel Czirai &lt;xftroxgpx@protonmail.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Emanuel Czirai &lt;xftroxgpx@protonmail.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Link: https://lkml.kernel.org/r/20180314183615.17629-1-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode: Synchronize late microcode loading</title>
<updated>2018-03-08T09:19:26Z</updated>
<author>
<name>Ashok Raj</name>
</author>
<published>2018-02-28T10:28:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a5321aec6412b20b5ad15db2d6b916c05349dbff'/>
<id>urn:sha1:a5321aec6412b20b5ad15db2d6b916c05349dbff</id>
<content type='text'>
Original idea by Ashok, completely rewritten by Borislav.

Before you read any further: the early loading method is still the
preferred one and you should always do that. The following patch is
improving the late loading mechanism for long running jobs and cloud use
cases.

Gather all cores and serialize the microcode update on them by doing it
one-by-one to make the late update process as reliable as possible and
avoid potential issues caused by the microcode update.

[ Borislav: Rewrite completely. ]

Co-developed-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Reviewed-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Cc: Arjan Van De Ven &lt;arjan.van.de.ven@intel.com&gt;
Link: https://lkml.kernel.org/r/20180228102846.13447-8-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode: Request microcode on the BSP</title>
<updated>2018-03-08T09:19:26Z</updated>
<author>
<name>Borislav Petkov</name>
</author>
<published>2018-02-28T10:28:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cfb52a5a09c8ae3a1dafb44ce549fde5b69e8117'/>
<id>urn:sha1:cfb52a5a09c8ae3a1dafb44ce549fde5b69e8117</id>
<content type='text'>
... so that any newer version can land in the cache and can later be
fished out by the application functions. Do that before grabbing the
hotplug lock.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Reviewed-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Cc: Arjan Van De Ven &lt;arjan.van.de.ven@intel.com&gt;
Link: https://lkml.kernel.org/r/20180228102846.13447-7-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode/intel: Look into the patch cache first</title>
<updated>2018-03-08T09:19:26Z</updated>
<author>
<name>Borislav Petkov</name>
</author>
<published>2018-02-28T10:28:44Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d8c3b52c00a05036e0a6b315b4b17921a7b67997'/>
<id>urn:sha1:d8c3b52c00a05036e0a6b315b4b17921a7b67997</id>
<content type='text'>
The cache might contain a newer patch - look in there first.

A follow-on change will make sure newest patches are loaded into the
cache of microcode patches.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Arjan Van De Ven &lt;arjan.van.de.ven@intel.com&gt;
Link: https://lkml.kernel.org/r/20180228102846.13447-6-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode: Do not upload microcode if CPUs are offline</title>
<updated>2018-03-08T09:19:26Z</updated>
<author>
<name>Ashok Raj</name>
</author>
<published>2018-02-28T10:28:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=30ec26da9967d0d785abc24073129a34c3211777'/>
<id>urn:sha1:30ec26da9967d0d785abc24073129a34c3211777</id>
<content type='text'>
Avoid loading microcode if any of the CPUs are offline, and issue a
warning. Having different microcode revisions on the system at any time
is outright dangerous.

[ Borislav: Massage changelog. ]

Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Reviewed-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Cc: Arjan Van De Ven &lt;arjan.van.de.ven@intel.com&gt;
Link: http://lkml.kernel.org/r/1519352533-15992-4-git-send-email-ashok.raj@intel.com
Link: https://lkml.kernel.org/r/20180228102846.13447-5-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode/intel: Writeback and invalidate caches before updating microcode</title>
<updated>2018-03-08T09:19:25Z</updated>
<author>
<name>Ashok Raj</name>
</author>
<published>2018-02-28T10:28:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=91df9fdf51492aec9fed6b4cbd33160886740f47'/>
<id>urn:sha1:91df9fdf51492aec9fed6b4cbd33160886740f47</id>
<content type='text'>
Updating microcode is less error prone when caches have been flushed and
depending on what exactly the microcode is updating. For example, some
of the issues around certain Broadwell parts can be addressed by doing a
full cache flush.

[ Borislav: Massage it and use native_wbinvd() in both cases. ]

Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Arjan Van De Ven &lt;arjan.van.de.ven@intel.com&gt;
Link: http://lkml.kernel.org/r/1519352533-15992-3-git-send-email-ashok.raj@intel.com
Link: https://lkml.kernel.org/r/20180228102846.13447-4-bp@alien8.de

</content>
</entry>
<entry>
<title>x86/microcode/intel: Check microcode revision before updating sibling threads</title>
<updated>2018-03-08T09:19:25Z</updated>
<author>
<name>Ashok Raj</name>
</author>
<published>2018-02-28T10:28:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c182d2b7d0ca48e0d6ff16f7d883161238c447ed'/>
<id>urn:sha1:c182d2b7d0ca48e0d6ff16f7d883161238c447ed</id>
<content type='text'>
After updating microcode on one of the threads of a core, the other
thread sibling automatically gets the update since the microcode
resources on a hyperthreaded core are shared between the two threads.

Check the microcode revision on the CPU before performing a microcode
update and thus save us the WRMSR 0x79 because it is a particularly
expensive operation.

[ Borislav: Massage changelog and coding style. ]

Signed-off-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Tested-by: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Arjan Van De Ven &lt;arjan.van.de.ven@intel.com&gt;
Link: http://lkml.kernel.org/r/1519352533-15992-2-git-send-email-ashok.raj@intel.com
Link: https://lkml.kernel.org/r/20180228102846.13447-3-bp@alien8.de

</content>
</entry>
</feed>
