<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/kernel/cpu/intel.c, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2009-03-23T21:55:23Z</updated>
<entry>
<title>Fix misreporting of #cores as #hyperthreads for Q9550</title>
<updated>2009-03-23T21:55:23Z</updated>
<author>
<name>Joe Korty</name>
</author>
<published>2009-03-19T17:28:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=157b13d83e8430243b1f075532ed42ecfc10a26b'/>
<id>urn:sha1:157b13d83e8430243b1f075532ed42ecfc10a26b</id>
<content type='text'>
For the Q9550, in x86_64 mode, /proc/cpuinfo mistakenly
thinks the #cores present is the #hyperthreads present.
i386 mode was not examined but is assumed to have the
same problem.

A backport of the following three 2.6.29-rc1 patches
fixes the problem:

 066941bd4eeb159307a5d7d795100d0887c00442:
    [PATCH] x86: unmask CPUID levels on Intel CPUs
 99fb4d349db7e7dacb2099c5cc320a9e2d31c1ef:
    [PATCH] x86: unmask CPUID levels on Intel CPUs, fix
 bdf21a49bab28f0d9613e8d8724ef9c9168b61b9:
    [PATCH] x86: add MSR_IA32_MISC_ENABLE bits to &lt;asm/msr-index.h&gt;

From the first patch: "If the CPUID limit bit in
MSR_IA32_MISC_ENABLE is set, clear it to make all CPUID
information available.  This is required for some features
to work, in particular XSAVE."

Originally-Developed-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Backported-by: Joe Korty &lt;joe.korty@ccur.com&gt;
Signed-off-by: Joe Korty &lt;joe.korty@ccur.com&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomolies</title>
<updated>2009-01-18T18:43:44Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2008-12-19T02:09:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6c2c40d1f8d457306f77524dfc0bf6f60b831fca'/>
<id>urn:sha1:6c2c40d1f8d457306f77524dfc0bf6f60b831fca</id>
<content type='text'>
commit 345077cd98ff5532b2d1158013c3fec7b1ae85ec upstream.

Impact: fix wrong cache sharing detection on platforms supporting &gt; 8 bit apicid's

In the presence of extended topology eumeration leaf 0xb provided
by cpuid, 32bit extended initial_apicid in cpuinfo_x86 struct will be
updated by detect_extended_topology(). At this instance, we should also
reinit the apicid (which could also potentially be extended to 32bit).

With out this there will potentially be duplicate apicid's populated in the
per cpu's cpuinfo_x86 struct, resulting in wrong cache sharing topology etc
detected by init_intel_cacheinfo().

Reported-by: Dimitri Sivanich &lt;sivanich@sgi.com&gt;
Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Acked-by: Dimitri Sivanich &lt;sivanich@sgi.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86: print out apic id in hex format</title>
<updated>2008-10-16T14:53:09Z</updated>
<author>
<name>Yinghai Lu</name>
</author>
<published>2008-09-11T04:56:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=823b259b80158a5fb694f6784e18b5bae669c599'/>
<id>urn:sha1:823b259b80158a5fb694f6784e18b5bae669c599</id>
<content type='text'>
Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: extended "flags" to show virtualization HW feature in /proc/cpuinfo</title>
<updated>2008-09-10T12:00:56Z</updated>
<author>
<name>Sheng Yang</name>
</author>
<published>2008-09-10T10:53:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e38e05a85828dac23540cd007df5f20985388afc'/>
<id>urn:sha1:e38e05a85828dac23540cd007df5f20985388afc</id>
<content type='text'>
The hardware virtualization technology evolves very fast. But currently
it's hard to tell if your CPU support a certain kind of HW technology
without digging into the source code.

The patch add a new catagory in "flags" under /proc/cpuinfo. Now "flags"
can indicate the (important) HW virtulization features the CPU supported
as well.

Current implementation just cover Intel VMX side.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: intel.c put workaround for old cpus together</title>
<updated>2008-09-10T06:21:06Z</updated>
<author>
<name>Yinghai Lu</name>
</author>
<published>2008-09-09T23:40:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4052704d92c3172ebc13cc0cc8df8ba2bd446a5c'/>
<id>urn:sha1:4052704d92c3172ebc13cc0cc8df8ba2bd446a5c</id>
<content type='text'>
consolidate the code some more.

No change in functionality intended.

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: make intel.c have 64-bit support code</title>
<updated>2008-09-10T06:21:03Z</updated>
<author>
<name>Yinghai Lu</name>
</author>
<published>2008-09-09T23:40:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=185f3b9da24c09c26b784591ed354fe57998a7b1'/>
<id>urn:sha1:185f3b9da24c09c26b784591ed354fe57998a7b1</id>
<content type='text'>
prepare for unification.

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86/pebs' into x86/unify-cpu-detect</title>
<updated>2008-09-10T06:20:51Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-09-10T06:20:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=81faaae45701484bd7368336e02f2a846153b22f'/>
<id>urn:sha1:81faaae45701484bd7368336e02f2a846153b22f</id>
<content type='text'>
Conflicts:
	arch/x86/Kconfig.cpu
	include/asm-x86/ds.h

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: little clean up of intel.c/intel_64.c</title>
<updated>2008-09-08T13:46:03Z</updated>
<author>
<name>Yinghai Lu</name>
</author>
<published>2008-09-08T00:58:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f69feff720497237ae9dd2f4604921bd3080c421'/>
<id>urn:sha1:f69feff720497237ae9dd2f4604921bd3080c421</id>
<content type='text'>
Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86/x2apic' into x86/core</title>
<updated>2008-09-05T07:21:21Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-09-05T07:21:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9042763808c5285a1a61b45b0fe98a710a4c903c'/>
<id>urn:sha1:9042763808c5285a1a61b45b0fe98a710a4c903c</id>
<content type='text'>
Conflicts:
	arch/x86/kernel/cpu/common_64.c

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: remove cpu_vendor_dev</title>
<updated>2008-09-04T19:09:45Z</updated>
<author>
<name>Yinghai Lu</name>
</author>
<published>2008-09-04T19:09:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=10a434fcb23a57c385177a0086955fae01003f64'/>
<id>urn:sha1:10a434fcb23a57c385177a0086955fae01003f64</id>
<content type='text'>
1. add c_x86_vendor into cpu_dev
2. change cpu_devs to static
3. check c_x86_vendor before put that cpu_dev into array
4. remove alignment for 64bit
5. order the sequence in cpu_devs according to link sequence...
   so could put intel at first, then amd...

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
</feed>
