<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/kernel/cpu/common.c, branch linux-2.6.30.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.30.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.30.y'/>
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<updated>2009-09-24T15:27:21Z</updated>
<entry>
<title>x86/i386: Make sure stack-protector segment base is cache aligned</title>
<updated>2009-09-24T15:27:21Z</updated>
<author>
<name>Jeremy Fitzhardinge</name>
</author>
<published>2009-09-03T19:27:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0863b5e00d32b9adaf93226c893918af297b74f3'/>
<id>urn:sha1:0863b5e00d32b9adaf93226c893918af297b74f3</id>
<content type='text'>
commit 1ea0d14e480c245683927eecc03a70faf06e80c8 upstream.

The Intel Optimization Reference Guide says:

	In Intel Atom microarchitecture, the address generation unit
	assumes that the segment base will be 0 by default. Non-zero
	segment base will cause load and store operations to experience
	a delay.
		- If the segment base isn't aligned to a cache line
		  boundary, the max throughput of memory operations is
		  reduced to one [e]very 9 cycles.
	[...]
	Assembly/Compiler Coding Rule 15. (H impact, ML generality)
	For Intel Atom processors, use segments with base set to 0
	whenever possible; avoid non-zero segment base address that is
	not aligned to cache line boundary at all cost.

We can't avoid having a non-zero base for the stack-protector
segment, but we can make it cache-aligned.

Signed-off-by: Jeremy Fitzhardinge &lt;jeremy.fitzhardinge@citrix.com&gt;
LKML-Reference: &lt;4AA01893.6000507@goop.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86: introduce noxsave boot parameter</title>
<updated>2009-05-22T20:10:54Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2009-05-22T19:17:45Z</published>
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<id>urn:sha1:0c752a93353d9b17dbe148312d732fbe06d235e1</id>
<content type='text'>
Introduce "noxsave" boot parameter which will disable the cpu's xsave/xrstor
capabilities. Useful for debugging and working around xsave related issues.

[ Impact: make it possible to debug problems in the field ]

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
<entry>
<title>x86: initialize io_bitmap_base on 32bit</title>
<updated>2009-05-01T19:09:53Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2009-05-01T18:59:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f9a196b8dceba3c1e5fe885b81e45043ad7c60fc'/>
<id>urn:sha1:f9a196b8dceba3c1e5fe885b81e45043ad7c60fc</id>
<content type='text'>
commit db949bba3c7cf2e664ac12e237c6d4c914f0c69d (x86-32: use non-lazy
io bitmap context switching) broke ioperm for 32bit because it removed
the lazy initialization of io_bitmap_base and did not set it to the
real bitmap offset.

[ Impact: fix non-working sys_ioperm() on 32-bit kernels ]

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'linus' into cpumask-for-linus</title>
<updated>2009-03-30T21:53:32Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2009-03-30T21:53:32Z</published>
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<id>urn:sha1:65fb0d23fcddd8697c871047b700c78817bdaa43</id>
<content type='text'>
Conflicts:
	arch/x86/kernel/cpu/common.c
</content>
</entry>
<entry>
<title>cpumask: fix CONFIG_CPUMASK_OFFSTACK=y cpu hotunplug crash</title>
<updated>2009-03-18T08:40:35Z</updated>
<author>
<name>Rusty Russell</name>
</author>
<published>2009-03-17T04:20:34Z</published>
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<id>urn:sha1:30e1e6d1af2b67558bccf322af2b3e0676b209ae</id>
<content type='text'>
Impact: Fix cpu offline when CONFIG_MAXSMP=y

Changeset bc9b83dd1f66402b870301c3c7117b9c1484abb4 "cpumask: convert
c1e_mask in arch/x86/kernel/process.c to cpumask_var_t" contained a
bug: c1e_mask is manipulated even if C1E isn't detected (and hence
not allocated).

This is simply fixed by checking for NULL (which gcc optimizes out
anyway of CONFIG_CPUMASK_OFFSTACK=n, since it knows ce1_mask can never
be NULL).

In addition, fix a leak where select_idle_routine re-allocates
(and re-clears) c1e_mask on every cpu init.

Reported-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Mike Travis &lt;travis@sgi.com&gt;
LKML-Reference: &lt;200903171450.34549.rusty@rustcorp.com.au&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Merge branches 'x86/apic', 'x86/asm', 'x86/cleanups', 'x86/debug', 'x86/kconfig', 'x86/mm', 'x86/ptrace', 'x86/setup' and 'x86/urgent'; commit 'v2.6.29-rc8' into x86/core</title>
<updated>2009-03-14T15:25:40Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2009-03-14T15:25:40Z</published>
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<id>urn:sha1:0ca0f16fd17c5d880dd0abbe03595b0c7c5b3c95</id>
<content type='text'>
</content>
</entry>
<entry>
<title>x86: cpu/common.c more cleanups</title>
<updated>2009-03-14T09:37:34Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2009-03-14T07:46:17Z</published>
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<id>urn:sha1:0f3fa48a7eaf5d1118cfda1650e8c759b2a116e4</id>
<content type='text'>
Complete/fix the cleanups of cpu/common.c:

 - fix ugly warning due to asm/topology.h -&gt; linux/topology.h change
 - standardize the style across the file
 - simplify/refactor the code flow where possible

Cc: Jaswinder Singh Rajput &lt;jaswinder@kernel.org&gt;
LKML-Reference: &lt;1237009789.4387.2.camel@localhost.localdomain&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: cpu/common.c cleanups</title>
<updated>2009-03-14T07:59:50Z</updated>
<author>
<name>Jaswinder Singh Rajput</name>
</author>
<published>2009-03-14T05:49:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9766cdbcb260389669e9679b2aa87c11832f479f'/>
<id>urn:sha1:9766cdbcb260389669e9679b2aa87c11832f479f</id>
<content type='text'>
- fix various style problems
 - declare varibles before they get used
 - introduced clear_all_debug_regs
 - fix header files issues

LKML-Reference: &lt;1237009789.4387.2.camel@localhost.localdomain&gt;
Signed-off-by: Jaswinder Singh Rajput &lt;jaswinder@kernel.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: unify cpu_callin_mask/cpu_callout_mask/cpu_initialized_mask/cpu_sibling_setup_mask</title>
<updated>2009-03-13T04:19:54Z</updated>
<author>
<name>Rusty Russell</name>
</author>
<published>2009-03-13T04:19:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3f76a183de8ad3aeb7425f3d9685bb6003abd1a5'/>
<id>urn:sha1:3f76a183de8ad3aeb7425f3d9685bb6003abd1a5</id>
<content type='text'>
Impact: cleanup

Signed-off-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
</content>
</entry>
<entry>
<title>x86, 32-bit: also use cpuinfo_x86's x86_{phys,virt}_bits members</title>
<updated>2009-03-13T01:37:17Z</updated>
<author>
<name>Jan Beulich</name>
</author>
<published>2009-03-12T12:37:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=13c6c53282d99c82e79b02477efd2c1e30a991ef'/>
<id>urn:sha1:13c6c53282d99c82e79b02477efd2c1e30a991ef</id>
<content type='text'>
Impact: 32/64-bit consolidation

In a first step, this allows fixing phys_addr_valid() for PAE (which
until now reported all addresses to be valid). Subsequently, this will
also allow simplifying some MTRR handling code.

Signed-off-by: Jan Beulich &lt;jbeulich@novell.com&gt;
LKML-Reference: &lt;49B9101E.76E4.0078.0@novell.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
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