<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/kernel/cpu/addon_cpuid_features.c, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2009-01-18T18:43:44Z</updated>
<entry>
<title>x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomolies</title>
<updated>2009-01-18T18:43:44Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2008-12-19T02:09:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6c2c40d1f8d457306f77524dfc0bf6f60b831fca'/>
<id>urn:sha1:6c2c40d1f8d457306f77524dfc0bf6f60b831fca</id>
<content type='text'>
commit 345077cd98ff5532b2d1158013c3fec7b1ae85ec upstream.

Impact: fix wrong cache sharing detection on platforms supporting &gt; 8 bit apicid's

In the presence of extended topology eumeration leaf 0xb provided
by cpuid, 32bit extended initial_apicid in cpuinfo_x86 struct will be
updated by detect_extended_topology(). At this instance, we should also
reinit the apicid (which could also potentially be extended to 32bit).

With out this there will potentially be duplicate apicid's populated in the
per cpu's cpuinfo_x86 struct, resulting in wrong cache sharing topology etc
detected by init_intel_cacheinfo().

Reported-by: Dimitri Sivanich &lt;sivanich@sgi.com&gt;
Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Acked-by: Dimitri Sivanich &lt;sivanich@sgi.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>x86: use CONFIG_X86_SMP instead of CONFIG_SMP</title>
<updated>2008-10-30T21:53:10Z</updated>
<author>
<name>James Bottomley</name>
</author>
<published>2008-10-30T21:05:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=017d9d20d88cacb0a6a29f343b23c95e203f6645'/>
<id>urn:sha1:017d9d20d88cacb0a6a29f343b23c95e203f6645</id>
<content type='text'>
Impact: fix x86/Voyager boot

CONFIG_SMP is used for features which work on *all* x86 boxes.
CONFIG_X86_SMP is used for standard PC like x86 boxes (for things like
multi core and apics)

Signed-off-by: James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Merge branch 'linus' into x86/x2apic</title>
<updated>2008-09-04T11:02:35Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-09-04T11:02:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=42390cdec5f6e6e2ee54f308474a6ef7dd16aa5c'/>
<id>urn:sha1:42390cdec5f6e6e2ee54f308474a6ef7dd16aa5c</id>
<content type='text'>
Conflicts:
	arch/x86/kernel/cpu/cyrix.c
	include/asm-x86/cpufeature.h

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: use x2apic id reported by cpuid during topology discovery, fix</title>
<updated>2008-08-27T07:02:19Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2008-08-23T15:47:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=11c231a962c740b3216eb6565149ae5a7944cba7'/>
<id>urn:sha1:11c231a962c740b3216eb6565149ae5a7944cba7</id>
<content type='text'>
v2: Fix for !SMP build

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: use cpuid vector 0xb when available for detecting cpu topology</title>
<updated>2008-08-23T15:47:10Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2008-08-23T15:47:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bbb65d2d365efe9951290e61678dcf81ec60add4'/>
<id>urn:sha1:bbb65d2d365efe9951290e61678dcf81ec60add4</id>
<content type='text'>
cpuid leaf 0xb provides extended topology enumeration. This interface provides
the 32-bit x2APIC id of the logical processor and it also provides a new
mechanism to detect SMT and core siblings (which provides increased
addressability).

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: PAT Update validate_pat_support for intel CPUs</title>
<updated>2008-08-21T11:27:34Z</updated>
<author>
<name>venkatesh.pallipadi@intel.com</name>
</author>
<published>2008-08-20T23:45:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8323444b5dba3fe55e56a95d20d8f55c1d6745af'/>
<id>urn:sha1:8323444b5dba3fe55e56a95d20d8f55c1d6745af</id>
<content type='text'>
Pentium III and Core Solo/Duo CPUs have an erratum
" Page with PAT set to WC while associated MTRR is UC may consolidate to UC "
which can result in WC setting in PAT to be ineffective. We will disable
PAT on such CPUs, so that we can continue to use MTRR WC setting.

Signed-off-by: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: PAT: fixed checkpatch errors (and whitespaces)</title>
<updated>2008-06-12T08:14:24Z</updated>
<author>
<name>Andreas Herrmann</name>
</author>
<published>2008-06-10T14:05:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cd7a4e936d345ab4cb49d68192d90bd4e4c58458'/>
<id>urn:sha1:cd7a4e936d345ab4cb49d68192d90bd4e4c58458</id>
<content type='text'>
x86: PAT: fixed checkpatch errors (and whitespaces)

Signed-off-by: Andreas Herrmann &lt;andreas.herrmann3@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: PAT: fix ambiguous paranoia check in pat_init()</title>
<updated>2008-06-12T08:14:22Z</updated>
<author>
<name>Andreas Herrmann</name>
</author>
<published>2008-06-10T14:05:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=97cfab6ac4ddfda0d722393bbf46cc40bc332107'/>
<id>urn:sha1:97cfab6ac4ddfda0d722393bbf46cc40bc332107</id>
<content type='text'>
Starting with commit 8d4a4300854f3971502e81dacd930704cb88f606 (x86:
cleanup PAT cpu validation) the PAT CPU feature flag is not cleared
anymore. Now the error message

  "PAT enabled, but CPU feature cleared"

in pat_init() is misleading.

Furthermore the current code does not check for existence of the PAT
CPU feature flag if a CPU is whitelisted in validate_pat_support.

This patch clears pat_wc_enabled if boot CPU has no PAT feature flag
and adapts the paranoia check.

Signed-off-by: Andreas Herrmann &lt;andreas.herrmann3@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: unconditionally enable PAT for AMD CPUs</title>
<updated>2008-06-12T08:14:20Z</updated>
<author>
<name>Andreas Herrmann</name>
</author>
<published>2008-06-10T14:04:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ee863ba7ab3d3ed8a9585d378aae69d1e3e9f1b4'/>
<id>urn:sha1:ee863ba7ab3d3ed8a9585d378aae69d1e3e9f1b4</id>
<content type='text'>
If PAT support is advertised it should just work. No errata known.

Signed-off-by: Andreas Herrmann &lt;andreas.herrmann3@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: Add Centaur and Transmeta CPUs to PAT whitelist</title>
<updated>2008-05-22T20:25:22Z</updated>
<author>
<name>Dave Jones</name>
</author>
<published>2008-05-22T17:02:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=873b274a41c0cfe58b2eb0a7722424eb367b905b'/>
<id>urn:sha1:873b274a41c0cfe58b2eb0a7722424eb367b905b</id>
<content type='text'>
Unconditionally enable PAT support on Centaur and Transmeta CPUs.
All known models that advertise PAT have no known errata.

Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
</feed>
