<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/kernel/acpi/processor.c, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2008-07-16T21:27:04Z</updated>
<entry>
<title>ACPI: Disable the C2C3_FFH access mode HW has no MWAIT support</title>
<updated>2008-07-16T21:27:04Z</updated>
<author>
<name>Zhao Yakui</name>
</author>
<published>2008-06-17T06:39:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5b53496a5ad79e91052f72761a7c5516b069bc99'/>
<id>urn:sha1:5b53496a5ad79e91052f72761a7c5516b069bc99</id>
<content type='text'>
991528d7348667924176f3e29addea0675298944
(ACPI: Processor native C-states using MWAIT)
started passing C2C3_FFH to _PDC to tell the BIOS
that Linux supports MWAIT for deep C-states.

However, we should first double check with the hardware
that it actually supports MWAIT before potentially exposing
a BIOS bug of an MWAIT _CST on HW that doesn't support MWAIT.

Signed-off-by: Zhao Yakui &lt;yakui.zhao@intel.com&gt;
Signed-off-by: Li Shaohua &lt;shaohua.li@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
Signed-off-by: Andi Kleen &lt;ak@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86: remove pointless comments</title>
<updated>2008-04-19T17:19:54Z</updated>
<author>
<name>WANG Cong</name>
</author>
<published>2008-03-08T10:15:06Z</published>
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<id>urn:sha1:cf9b111c170733dde39139e8989b676ec8b81573</id>
<content type='text'>
Remove old comments that include the old arch/i386 directory.

Signed-off-by: WANG Cong &lt;xiyou.wangcong@gmail.com&gt;
Acked-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>ACPI: Set _PSD ACPI_PDC_SMP_T_SWCOORD</title>
<updated>2008-02-02T07:22:43Z</updated>
<author>
<name>Zhao Yakui</name>
</author>
<published>2008-01-28T05:53:21Z</published>
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<id>urn:sha1:3abbd337c60591305cbfeb984ff2922c175be37f</id>
<content type='text'>
The ACPI_PDC_SMP_T_SWCOORD bit is set by and OS that is capable of
native ACPI throttling software coordination for mutli-processors
using the _TSD information.

Signed-off-by: Zhao Yakui &lt;yakui.zhao@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI: Enable MSR (FixedHW) support for T-States</title>
<updated>2007-11-17T02:46:25Z</updated>
<author>
<name>Zhao Yakui</name>
</author>
<published>2007-11-15T09:06:36Z</published>
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<id>urn:sha1:f79f06ab9f86d7203006d2ec8992ac80df36a34e</id>
<content type='text'>
Add throttling control via MSR when T-states uses
the FixHW Control Status registers.

Signed-off-by: Zhao Yakui &lt;yakui.zhao@intel.com&gt;
Signed-off-by: Li Shaohua &lt;shaohua.li@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>x86: fix !SMP compiler warning in arch/x86/kernel/acpi/processor.c</title>
<updated>2007-10-27T18:57:43Z</updated>
<author>
<name>Jeff Garzik</name>
</author>
<published>2007-10-27T18:57:43Z</published>
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<id>urn:sha1:74a3d2d331246a12428b027e21d508679187fcf0</id>
<content type='text'>
Fix !CONFIG_SMP warning:

arch/x86/kernel/acpi/processor.c: In function arch_acpi_processor_init_pdc:
arch/x86/kernel/acpi/processor.c:65: warning: unused variable cpu

Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>x86: convert cpuinfo_x86 array to a per_cpu array</title>
<updated>2007-10-19T18:35:04Z</updated>
<author>
<name>Mike Travis</name>
</author>
<published>2007-10-19T18:35:04Z</published>
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<id>urn:sha1:92cb7612aee39642d109b8d935ad265e602c0563</id>
<content type='text'>
cpu_data is currently an array defined using NR_CPUS.  This means that
we overallocate since we will rarely really use maximum configured cpus.
When NR_CPU count is raised to 4096 the size of cpu_data becomes
3,145,728 bytes.

These changes were adopted from the sparc64 (and ia64) code.  An
additional field was added to cpuinfo_x86 to be a non-ambiguous cpu
index.  This corresponds to the index into a cpumask_t as well as the
per_cpu index.  It's used in various places like show_cpuinfo().

cpu_data is defined to be the boot_cpu_data structure for the NON-SMP
case.

Signed-off-by: Mike Travis &lt;travis@sgi.com&gt;
Acked-by: Christoph Lameter &lt;clameter@sgi.com&gt;
Cc: Andi Kleen &lt;ak@suse.de&gt;
Cc: James Bottomley &lt;James.Bottomley@steeleye.com&gt;
Cc: Dmitry Torokhov &lt;dtor@mail.ru&gt;
Cc: "Antonino A. Daplas" &lt;adaplas@pol.net&gt;
Cc: Mark M. Hoffman &lt;mhoffman@lightlink.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>i386: move kernel/acpi</title>
<updated>2007-10-11T09:16:23Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2007-10-11T09:16:23Z</published>
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<id>urn:sha1:23d6f82bd1f07886b3a974c5193baa715475dd37</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
</feed>
