<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/include/asm/xsave.h, branch linux-3.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.10.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.10.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2012-09-22T00:18:44Z</updated>
<entry>
<title>Merge branch 'x86/fpu' into x86/smap</title>
<updated>2012-09-22T00:18:44Z</updated>
<author>
<name>H. Peter Anvin</name>
</author>
<published>2012-09-22T00:18:44Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=49b8c695e331c9685e6ffdbf34872509d77c8459'/>
<id>urn:sha1:49b8c695e331c9685e6ffdbf34872509d77c8459</id>
<content type='text'>
Reason for merge:
       x86/fpu changed the structure of some of the code that x86/smap
       changes; mostly fpu-internal.h but also minor changes to the
       signal code.

Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;

Resolved Conflicts:
	arch/x86/ia32/ia32_signal.c
	arch/x86/include/asm/fpu-internal.h
	arch/x86/kernel/signal.c
</content>
</entry>
<entry>
<title>x86, smap: Add STAC and CLAC instructions to control user space access</title>
<updated>2012-09-21T19:45:27Z</updated>
<author>
<name>H. Peter Anvin</name>
</author>
<published>2012-09-21T19:43:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=63bcff2a307b9bcc712a8251eb27df8b2e117967'/>
<id>urn:sha1:63bcff2a307b9bcc712a8251eb27df8b2e117967</id>
<content type='text'>
When Supervisor Mode Access Prevention (SMAP) is enabled, access to
userspace from the kernel is controlled by the AC flag.  To make the
performance of manipulating that flag acceptable, there are two new
instructions, STAC and CLAC, to set and clear it.

This patch adds those instructions, via alternative(), when the SMAP
feature is enabled.  It also adds X86_EFLAGS_AC unconditionally to the
SYSCALL entry mask; there is simply no reason to make that one
conditional.

Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Link: http://lkml.kernel.org/r/1348256595-29119-9-git-send-email-hpa@linux.intel.com
</content>
</entry>
<entry>
<title>x86, fpu: use non-lazy fpu restore for processors supporting xsave</title>
<updated>2012-09-18T22:52:11Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2012-08-24T21:13:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=304bceda6a18ae0b0240b8aac9a6bdf8ce2d2469'/>
<id>urn:sha1:304bceda6a18ae0b0240b8aac9a6bdf8ce2d2469</id>
<content type='text'>
Fundamental model of the current Linux kernel is to lazily init and
restore FPU instead of restoring the task state during context switch.
This changes that fundamental lazy model to the non-lazy model for
the processors supporting xsave feature.

Reasons driving this model change are:

i. Newer processors support optimized state save/restore using xsaveopt and
xrstor by tracking the INIT state and MODIFIED state during context-switch.
This is faster than modifying the cr0.TS bit which has serializing semantics.

ii. Newer glibc versions use SSE for some of the optimized copy/clear routines.
With certain workloads (like boot, kernel-compilation etc), application
completes its work with in the first 5 task switches, thus taking upto 5 #DNA
traps with the kernel not getting a chance to apply the above mentioned
pre-load heuristic.

iii. Some xstate features (like AMD's LWP feature) don't honor the cr0.TS bit
and thus will not work correctly in the presence of lazy restore. Non-lazy
state restore is needed for enabling such features.

Some data on a two socket SNB system:
 * Saved 20K DNA exceptions during boot on a two socket SNB system.
 * Saved 50K DNA exceptions during kernel-compilation workload.
 * Improved throughput of the AVX based checksumming function inside the
   kernel by ~15% as xsave/xrstor is faster than the serializing clts/stts
   pair.

Also now kernel_fpu_begin/end() relies on the patched
alternative instructions. So move check_fpu() which uses the
kernel_fpu_begin/end() after alternative_instructions().

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Link: http://lkml.kernel.org/r/1345842782-24175-7-git-send-email-suresh.b.siddha@intel.com
Merge 32-bit boot fix from,
Link: http://lkml.kernel.org/r/1347300665-6209-4-git-send-email-suresh.b.siddha@intel.com
Cc: Jim Kukunas &lt;james.t.kukunas@linux.intel.com&gt;
Cc: NeilBrown &lt;neilb@suse.de&gt;
Cc: Avi Kivity &lt;avi@redhat.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86, fpu: Unify signal handling code paths for x86 and x86_64 kernels</title>
<updated>2012-09-18T22:51:48Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2012-07-24T23:05:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=72a671ced66db6d1c2bfff1c930a101ac8d08204'/>
<id>urn:sha1:72a671ced66db6d1c2bfff1c930a101ac8d08204</id>
<content type='text'>
Currently for x86 and x86_32 binaries, fpstate in the user sigframe is copied
to/from the fpstate in the task struct.

And in the case of signal delivery for x86_64 binaries, if the fpstate is live
in the CPU registers, then the live state is copied directly to the user
sigframe. Otherwise  fpstate in the task struct is copied to the user sigframe.
During restore, fpstate in the user sigframe is restored directly to the live
CPU registers.

Historically, different code paths led to different bugs. For example,
x86_64 code path was not preemption safe till recently. Also there is lot
of code duplication for support of new features like xsave etc.

Unify signal handling code paths for x86 and x86_64 kernels.

New strategy is as follows:

Signal delivery: Both for 32/64-bit frames, align the core math frame area to
64bytes as needed by xsave (this where the main fpu/extended state gets copied
to and excludes the legacy compatibility fsave header for the 32-bit [f]xsave
frames). If the state is live, copy the register state directly to the user
frame. If not live, copy the state in the thread struct to the user frame. And
for 32-bit [f]xsave frames, construct the fsave header separately before
the actual [f]xsave area.

Signal return: As the 32-bit frames with [f]xstate has an additional
'fsave' header, copy everything back from the user sigframe to the
fpstate in the task structure and reconstruct the fxstate from the 'fsave'
header (Also user passed pointers may not be correctly aligned for
any attempt to directly restore any partial state). At the next fpstate usage,
everything will be restored to the live CPU registers.
For all the 64-bit frames and the 32-bit fsave frame, restore the state from
the user sigframe directly to the live CPU registers. 64-bit signals always
restored the math frame directly, so we can expect the math frame pointer
to be correctly aligned. For 32-bit fsave frames, there are no alignment
requirements, so we can restore the state directly.

"lat_sig catch" microbenchmark numbers (for x86, x86_64, x86_32 binaries) are
with in the noise range with this change.

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Link: http://lkml.kernel.org/r/1343171129-2747-4-git-send-email-suresh.b.siddha@intel.com
[ Merged in compilation fix ]
Link: http://lkml.kernel.org/r/1344544736.8326.17.camel@sbsiddha-desk.sc.intel.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86, fpu: Consolidate inline asm routines for saving/restoring fpu state</title>
<updated>2012-09-18T22:51:26Z</updated>
<author>
<name>Suresh Siddha</name>
</author>
<published>2012-07-24T23:05:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0ca5bd0d886578ad0afeceaa83458c0f35cb3c6b'/>
<id>urn:sha1:0ca5bd0d886578ad0afeceaa83458c0f35cb3c6b</id>
<content type='text'>
Consolidate x86, x86_64 inline asm routines saving/restoring fpu state
using config_enabled().

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Link: http://lkml.kernel.org/r/1343171129-2747-3-git-send-email-suresh.b.siddha@intel.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86, extable: Remove open-coded exception table entries in arch/x86/include/asm/xsave.h</title>
<updated>2012-04-20T20:51:40Z</updated>
<author>
<name>H. Peter Anvin</name>
</author>
<published>2012-04-20T20:42:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7a040a4384c7c4973deb4d58a76e1b0ee3c8aa39'/>
<id>urn:sha1:7a040a4384c7c4973deb4d58a76e1b0ee3c8aa39</id>
<content type='text'>
Remove open-coded exception table entries in arch/x86/include/asm/xsave.h,
and replace them with _ASM_EXTABLE() macros; this will allow us to
change the format and type of the exception table entries.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: David Daney &lt;david.daney@cavium.com&gt;
Cc: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Link: http://lkml.kernel.org/r/CA%2B55aFyijf43qSu3N9nWHEBwaGbb7T2Oq9A=9EyR=Jtyqfq_cQ@mail.gmail.com
</content>
</entry>
<entry>
<title>Merge branch 'x86-xsave-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip</title>
<updated>2010-08-06T23:25:13Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2010-08-06T23:25:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4a386c3e177ca2fbc70c9283d0b46537844763a0'/>
<id>urn:sha1:4a386c3e177ca2fbc70c9283d0b46537844763a0</id>
<content type='text'>
* 'x86-xsave-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, xsave: Make xstate_enable_boot_cpu() __init, protect on CPU 0
  x86, xsave: Add __init attribute to setup_xstate_features()
  x86, xsave: Make init_xstate_buf static
  x86, xsave: Check cpuid level for XSTATE_CPUID (0x0d)
  x86, xsave: Introduce xstate enable functions
  x86, xsave: Separate fpu and xsave initialization
  x86, xsave: Move boot cpu initialization to xsave_init()
  x86, xsave: 32/64 bit boot cpu check unification in initialization
  x86, xsave: Do not include asm/i387.h in asm/xsave.h
  x86, xsave: Use xsaveopt in context-switch path when supported
  x86, xsave: Sync xsave memory layout with its header for user handling
  x86, xsave: Track the offset, size of state in the xsave layout
</content>
</entry>
<entry>
<title>Merge branches 'x86-cleanups-for-linus', 'x86-vmware-for-linus', 'x86-mtrr-for-linus', 'x86-apic-for-linus', 'x86-fpu-for-linus' and 'x86-vdso-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip</title>
<updated>2010-08-06T23:22:59Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2010-08-06T23:22:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=75cb5fdce29c77ec54db45f0c6be7cc5715f8e15'/>
<id>urn:sha1:75cb5fdce29c77ec54db45f0c6be7cc5715f8e15</id>
<content type='text'>
* 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Clean up arch/x86/kernel/cpu/mtrr/cleanup.c: use ";" not "," to terminate statements

* 'x86-vmware-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, vmware: Preset lpj values when on VMware.

* 'x86-mtrr-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, mtrr: Use stop machine context to rendezvous all the cpu's

* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86/apic/es7000_32: Remove unused variable

* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Avoid unnecessary __clear_user() and xrstor in signal handling

* 'x86-vdso-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, vdso: Unmap vdso pages
</content>
</entry>
<entry>
<title>KVM: x86: XSAVE/XRSTOR live migration support</title>
<updated>2010-08-01T07:46:37Z</updated>
<author>
<name>Sheng Yang</name>
</author>
<published>2010-06-13T09:29:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2d5b5a665508c60577c1088e0405850a965b6795'/>
<id>urn:sha1:2d5b5a665508c60577c1088e0405850a965b6795</id>
<content type='text'>
This patch enable save/restore of xsave state.

Signed-off-by: Sheng Yang &lt;sheng@linux.intel.com&gt;
Signed-off-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
</content>
</entry>
<entry>
<title>x86: Export FPU API for KVM use</title>
<updated>2010-08-01T07:35:48Z</updated>
<author>
<name>Sheng Yang</name>
</author>
<published>2010-05-17T09:22:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5ee481da7b62a992b91f958bf26aaaa92354c170'/>
<id>urn:sha1:5ee481da7b62a992b91f958bf26aaaa92354c170</id>
<content type='text'>
Also add some constants.

Signed-off-by: Sheng Yang &lt;sheng@linux.intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
</feed>
