<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/tile/kernel/head_32.S, branch linux-3.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.2.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.2.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2011-03-17T18:32:06Z</updated>
<entry>
<title>arch/tile: support newer binutils assembler shift semantics</title>
<updated>2011-03-17T18:32:06Z</updated>
<author>
<name>Chris Metcalf</name>
</author>
<published>2011-03-17T18:32:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0dccb0489f9a5a13a33e828ab965aa49685d12f8'/>
<id>urn:sha1:0dccb0489f9a5a13a33e828ab965aa49685d12f8</id>
<content type='text'>
This change supports building the kernel with newer binutils where
a shift of greater than the word size is no longer interpreted
silently as modulo the word size, but instead generates a warning.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: catch up with section naming convention in 2.6.35</title>
<updated>2011-03-01T21:18:52Z</updated>
<author>
<name>Chris Metcalf</name>
</author>
<published>2011-02-27T23:52:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2cb82400719e085a3c226cf7cce8950208f09a06'/>
<id>urn:sha1:2cb82400719e085a3c226cf7cce8950208f09a06</id>
<content type='text'>
The convention changed to, e.g., ".data..page_aligned".  This commit
fixes the places in the tile architecture that were still using the
old convention.  One tile-specific section (.init.page) was dropped
in favor of just using an "aligned" attribute.

Sam Ravnborg &lt;sam@ravnborg.org&gt; pointed out __PAGE_ALIGNED_BSS, etc.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: parameterize system PLs to support KVM port</title>
<updated>2010-10-15T19:38:09Z</updated>
<author>
<name>Chris Metcalf</name>
</author>
<published>2010-10-14T20:23:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a78c942df64ef4cf495fd4d8715e48501bd7f8a4'/>
<id>urn:sha1:a78c942df64ef4cf495fd4d8715e48501bd7f8a4</id>
<content type='text'>
While not a port to KVM (yet), this change modifies the kernel
to be able to build either at PL1 or at PL2 with a suitable
config switch.  Pushing up this change avoids handling branch
merge issues going forward with the KVM work.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: core support for Tilera 32-bit chips.</title>
<updated>2010-06-04T21:11:18Z</updated>
<author>
<name>Chris Metcalf</name>
</author>
<published>2010-05-29T03:09:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=867e359b97c970a60626d5d76bbe2a8fadbf38fb'/>
<id>urn:sha1:867e359b97c970a60626d5d76bbe2a8fadbf38fb</id>
<content type='text'>
This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.

This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Reviewed-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
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