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<title>kernel.git/arch/sparc64/kernel/chmc.c, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
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<updated>2009-03-17T00:31:55Z</updated>
<entry>
<title>sparc64: Fix crashes in jbusmc_print_dimm()</title>
<updated>2009-03-17T00:31:55Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2009-02-11T08:54:07Z</published>
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<id>urn:sha1:b726dca0a412469d7786eb713101272cbf74b96f</id>
<content type='text'>
[ Upstream commit 1b0e235cc9bfae4bc0f5cd0cba929206fb0f6a64 ]

Return was missing for the case where there is no dimm
info match.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>chmc: Mark %ver register inline asm with __volatile__</title>
<updated>2008-10-13T06:56:12Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-10-13T06:56:12Z</published>
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<id>urn:sha1:615c9136b385d5225d3ece20aa30b28a90c438d6</id>
<content type='text'>
Otherwise GCC can try to do the register read before the guarding test
on us3mc_platform() being true.

If that happens we can take an exception, because %ver register reads
are not allowed in privileged more on hypervisor platforms.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Fix sparse warnings in chmc.c</title>
<updated>2008-09-12T07:22:42Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-09-12T07:22:42Z</published>
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<id>urn:sha1:3ab5827eb0fefbfa7234f3f91f78b50f2dfcf8e4</id>
<content type='text'>
Several constants are larger than 32-bit and need "UL" markers.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc: Annotate of_device_id arrays with const or __initdata.</title>
<updated>2008-08-31T08:23:17Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-08-31T08:23:17Z</published>
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<id>urn:sha1:fd098316ef533e8441576f020ead4beab93154ce</id>
<content type='text'>
As suggested by Stephen Rothwell.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Add JBUS UltraSPARC-IIIi support to memory controller driver.</title>
<updated>2008-08-25T20:38:30Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-08-25T20:38:30Z</published>
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<id>urn:sha1:85269eb5542b425b99d79dc4c312dce0157eac7e</id>
<content type='text'>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Add generic interface for registering a dimm printing handler.</title>
<updated>2008-08-25T05:08:34Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-08-25T05:08:34Z</published>
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<id>urn:sha1:881d021ab0d675f519b68df916fde969940ef988</id>
<content type='text'>
The way to do this varies by platform type and the exact memory
controller the cpu uses.

For Spitfire cpus we currently just use prom_getunumber() and hope
that works.

For Cheetah cpus we have a memory controller driver that can
compute this information.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Use consistent chmc_ prefix in variables, types, and functions.</title>
<updated>2008-08-25T04:45:44Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-08-25T04:45:44Z</published>
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<id>urn:sha1:83ef64b9dea6e3ed287a45d56166913bffcd2497</id>
<content type='text'>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: Convert UltraSPARC-III memory controller driver to OF driver probing.</title>
<updated>2008-08-25T04:32:42Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2008-08-25T04:32:42Z</published>
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<id>urn:sha1:b28422e32b9127ab4178ce05a419069db3d11d19</id>
<content type='text'>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>[SPARC64]: Fix memory controller register access when non-SMP.</title>
<updated>2007-12-07T09:10:14Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2007-12-07T08:58:55Z</published>
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<id>urn:sha1:b332b8bc9c67165eabdfc7d10b4a2e4cc9f937d0</id>
<content type='text'>
get_cpu() always returns zero on non-SMP builds, but we
really want the physical cpu number in this code in order
to do the right thing.

Based upon a non-SMP kernel boot failure report from Bernd Zeimetz.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>[SPARC64]: constify of_get_property return: arch/sparc64</title>
<updated>2007-04-26T08:54:24Z</updated>
<author>
<name>Stephen Rothwell</name>
</author>
<published>2007-04-23T22:53:27Z</published>
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<id>urn:sha1:6a23acf3905287eb952a6f1dbbc8fb3e4eeae2f6</id>
<content type='text'>
Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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