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<title>kernel.git/arch/sparc/include/asm/pgtable_64.h, branch linux-3.7.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.7.y</id>
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<updated>2013-02-27T17:21:12Z</updated>
<entry>
<title>sparc64: Fix get_user_pages_fast() wrt. THP.</title>
<updated>2013-02-27T17:21:12Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2013-02-13T20:21:06Z</published>
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<id>urn:sha1:1f751f60a108d559a55fab8a916144da0fb1bb88</id>
<content type='text'>
[ Upstream commit 89a77915e0f56dc7b9f9082ba787895b6a83f809 ]

Mostly mirrors the s390 logic, as unlike x86 we don't need the
SetPageReferenced() bits.

On sparc64 we also lack a user/privileged bit in the huge PMDs.

In order to make this work for THP and non-THP builds, some header
file adjustments were necessary.  Namely, provide the PMD_HUGE_* bit
defines and the pmd_large() inline unconditionally rather than
protected by TRANSPARENT_HUGEPAGE.

Reported-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.vnet.ibm.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>sparc64: Support transparent huge pages.</title>
<updated>2012-10-09T07:23:06Z</updated>
<author>
<name>David Miller</name>
</author>
<published>2012-10-08T23:34:29Z</published>
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<id>urn:sha1:9e695d2ecc8451cc2c1603d60b5c8e7f5581923a</id>
<content type='text'>
This is relatively easy since PMD's now cover exactly 4MB of memory.

Our PMD entries are 32-bits each, so we use a special encoding.  The
lowest bit, PMD_ISHUGE, determines the interpretation.  This is possible
because sparc64's page tables are purely software entities so we can use
whatever encoding scheme we want.  We just have to make the TLB miss
assembler page table walkers aware of the layout.

set_pmd_at() works much like set_pte_at() but it has to operate in two
page from a table of non-huge PTEs, so we have to queue up TLB flushes
based upon what mappings are valid in the PTE table.  In the second regime
we are going from huge-page to non-huge-page, and in that case we need
only queue up a single TLB flush to push out the huge page mapping.

We still have 5 bits remaining in the huge PMD encoding so we can very
likely support any new pieces of THP state tracking that might get added
in the future.

With lots of help from Johannes Weiner.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Johannes Weiner &lt;hannes@cmpxchg.org&gt;
Cc: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>sparc64: Document PGD and PMD layout.</title>
<updated>2012-10-09T07:23:05Z</updated>
<author>
<name>David Miller</name>
</author>
<published>2012-10-08T23:34:23Z</published>
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<id>urn:sha1:dbc9fdf063dc4f12af71d7858bd216170129822e</id>
<content type='text'>
We're going to be messing around with the PMD interpretation and layout
for the sake of transparent huge pages, so we better clearly document what
we're starting with.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Johannes Weiner &lt;hannes@cmpxchg.org&gt;
Cc: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>sparc64: Halve the size of PTE tables</title>
<updated>2012-10-09T07:23:04Z</updated>
<author>
<name>David Miller</name>
</author>
<published>2012-10-08T23:34:20Z</published>
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<id>urn:sha1:56a70b8c6acc73f5d9ec383d840909dd9e63c865</id>
<content type='text'>
The reason we want to do this is to facilitate transparent huge page
support.

Right now PMD's cover 8MB of address space, and our huge page size is 4MB.
 The current transparent hugepage support is not able to handle HPAGE_SIZE
!= PMD_SIZE.

So make PTE tables be sized to half of a page instead of a full page.

We can still map properly the whole supported virtual address range which
on sparc64 requires 44 bits.  Add a compile time CPP test which ensures
that this requirement is always met.

There is a minor inefficiency added by this change.  We only use half of
the page for PTE tables.  It's not trivial to use only half of the page
yet still get all of the pgtable_page_{ctor,dtor}() stuff working
properly.  It is doable, and that will come in a subsequent change.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Johannes Weiner &lt;hannes@cmpxchg.org&gt;
Cc: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>sparc64: Only support 4MB huge pages and 8KB base pages.</title>
<updated>2012-10-09T07:23:04Z</updated>
<author>
<name>David Miller</name>
</author>
<published>2012-10-08T23:34:19Z</published>
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<id>urn:sha1:15b9350a177b9fb23b69e00f78f52890ee338880</id>
<content type='text'>
Narrowing the scope of the page size configurations will make the
transparent hugepage changes much simpler.

In the end what we really want to do is have the kernel support multiple
huge page sizes and use whatever is appropriate as the context dictactes.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Johannes Weiner &lt;hannes@cmpxchg.org&gt;
Cc: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>sparc: Kill mmu_{un,}lockarea().</title>
<updated>2012-05-13T20:23:16Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2012-05-13T20:23:16Z</published>
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<id>urn:sha1:679bea5e438df70b5d4348fd2da4501aaeacebe0</id>
<content type='text'>
These were used on sun4c during floppy data transfers since on that
chip we had to lock the cpu mappings into the TLB because we cannot
take a TLB miss during the assembler floppy interrupt handler that
does the data transfer.

That is no longer necessary since we've removed sun4c support, thus
this stuff can disappear completely.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc: pgtable_64: change include order</title>
<updated>2012-04-01T21:22:23Z</updated>
<author>
<name>Aaro Koskinen</name>
</author>
<published>2012-04-01T08:54:38Z</published>
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<id>urn:sha1:2533e824153b51bda27fe41ed1a5512047f42707</id>
<content type='text'>
Fix the following build breakage in v3.4-rc1:

  CC      arch/sparc/kernel/cpu.o
In file included from /home/aaro/git/linux/arch/sparc/include/asm/pgtable_64.h:15:0,
                 from /home/aaro/git/linux/arch/sparc/include/asm/pgtable.h:4,
                 from arch/sparc/kernel/cpu.c:15:
include/asm-generic/pgtable-nopud.h:13:16: error: unknown type name 'pgd_t'
include/asm-generic/pgtable-nopud.h:25:28: error: unknown type name 'pgd_t'
include/asm-generic/pgtable-nopud.h:26:27: error: unknown type name 'pgd_t'
include/asm-generic/pgtable-nopud.h:27:31: error: unknown type name 'pgd_t'
include/asm-generic/pgtable-nopud.h:28:30: error: unknown type name 'pgd_t'
include/asm-generic/pgtable-nopud.h:38:34: error: unknown type name 'pgd_t'
In file included from /home/aaro/git/linux/arch/sparc/include/asm/pgtable_64.h:783:0,
                 from /home/aaro/git/linux/arch/sparc/include/asm/pgtable.h:4,
                 from arch/sparc/kernel/cpu.c:15:
include/asm-generic/pgtable.h: In function 'pgd_none_or_clear_bad':
include/asm-generic/pgtable.h:258:2: error: implicit declaration of function 'pgd_none' [-Werror=implicit-function-declaration]
include/asm-generic/pgtable.h:260:2: error: implicit declaration of function 'pgd_bad' [-Werror=implicit-function-declaration]
include/asm-generic/pgtable.h: In function 'pud_none_or_clear_bad':
include/asm-generic/pgtable.h:269:6: error: request for member 'pgd' in something not a structure or union

Reported-by: Meelis Roos &lt;mroos@linux.ee&gt;
Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>Disintegrate asm/system.h for Sparc</title>
<updated>2012-03-28T17:30:03Z</updated>
<author>
<name>David Howells</name>
</author>
<published>2012-03-28T17:30:03Z</published>
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<id>urn:sha1:d550bbd40c0e10aefa05103dadbe0ae42e683707</id>
<content type='text'>
Disintegrate asm/system.h for Sparc.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: sparclinux@vger.kernel.org
</content>
</entry>
<entry>
<title>sparc: Kill custom io_remap_pfn_range().</title>
<updated>2011-11-18T02:17:59Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2011-11-18T02:17:59Z</published>
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<id>urn:sha1:3e37fd3153ac95088a74f5e7c569f7567e9f993a</id>
<content type='text'>
To handle the large physical addresses, just make a simple wrapper
around remap_pfn_range() like MIPS does.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>sparc64: add support for _PAGE_SPECIAL</title>
<updated>2011-07-26T03:57:10Z</updated>
<author>
<name>David S. Miller</name>
</author>
<published>2011-07-26T00:12:21Z</published>
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<id>urn:sha1:683d2fa672da5e3b4fe96f13c43eba32b068d64b</id>
<content type='text'>
Luckily there are still a few software PTE bits remaining and they even
match up in both the sun4u and sun4v pte layouts.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
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