kernel.git/arch/sh/kernel/cpu/sh4a, branch linux-2.6.24.y

sh: Add resource of USBF for SH7722.

2007-10-30T04:05:31Z

Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt

sh: Fix URAM start address on SH7785.

2007-09-27T09:22:21Z

Not all of the SH-X2 URAM blocks are mapped in the same place, SH7785 happens to map it on the opposite end of the address space from SH7722, correct the addresses. Signed-off-by: Paul Mundt

sh: Fix plat_irq_setup_pins() for SH7785.

2007-09-27T07:45:46Z

There was some debug code left in here that caused the pin changes to never be hit. Kill that off, and all is well. Signed-off-by: Paul Mundt

sh: Initial SH-X3 SMP support.

2007-09-21T10:16:05Z

This adds basic support for SH-X3 SMP (4 CPUs). More IPI and cache debugging is necessary, mostly interfacing the d-cache coherency and the I-cache broadcast invalidates. Only for testing at present! Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt

sh: Hook up the SH-X3 SMP intc register groups.

2007-09-21T09:34:48Z

Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt

sh: Wire up URAM node on SH7785.

2007-09-21T02:57:55Z

Add SH7785 URAM as node 1, follows the SH-X3 change. Signed-off-by: Paul Mundt

sh: INTC stubs for SH7343 and SH7770 builds.

2007-09-21T02:57:53Z

Get the SH7343 and SH7770 stuff linking again. Both of these still require proper INTC support. Signed-off-by: Paul Mundt

sh: intc - irl mode update for sh7780 and sh7785

2007-09-21T02:57:51Z

This patch contains the following fixes and improvements: - Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780. - Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking. - Good old IRQ_MODE_IRLnnnn should not register any intc controller. - plat_irq_setup_pins() now selects IRL or IRQ mode. - the holding function is now disabled using ICR0. By default all external pin interrupts are disabled. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt

sh: intc - mark data structures as __initdata

2007-09-21T02:57:50Z

With the intc core improved it is now possible to put the intc data structures in the initdata section. Version two of this patch puts the __initdata inside DECLARE_INTC_DESC() and removes the __initdata included in the board specific r2d code. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt

sh: x3 - add ipi vectors

2007-09-21T02:57:50Z

With the intc dual prio register support in place it is now possible to add the ipi vectors to x3. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt