kernel.git/arch/sh/include/cpu-sh4, branch linux-2.6.30.y

sh: Tidy up sh7786 pinmux table.

2009-03-30T22:39:51Z

Formatting and typo fix. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt

sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.

2009-03-17T08:49:49Z

This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores that implement the PTAEX register and respective functionality. Presently only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs). The main change is in how the PTE is written out when loading the entry in to the TLB, as well as in how the TLB entry is selectively flushed. While SH-X2 extended mode splits out the memory-mapped U and I-TLB data arrays for extra bits, extended ASID mode splits out the address arrays. While we don't use the memory-mapped data array access, the address array accesses are necessary for selective TLB flushes, so these are implemented newly and replace the generic SH-4 implementation. With this, TLB flushes in switch_mm() are almost non-existent on newer parts. Signed-off-by: Paul Mundt

sh: dma-sh updates for multi IRQ and new SH-4A CPUs.

2009-03-10T08:26:49Z

This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85. This also enables multi IRQ support for platforms that have multiple vectors bound to the same IRQ source. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt

sh: Add support for SH7786 CPU subtype.

2009-03-03T06:40:25Z

This adds preliminary support for the SH7786 CPU subtype. While this is a dual-core CPU, only UP is supported for now. L2 cache support is likewise not yet implemented. More information on this particular CPU subtype is available at: http://www.renesas.com/fmwk.jsp?cnt=sh7786_root.jsp&fp=/products/mpumcu/superh_family/sh7780_series/sh7786_group/ Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt

sh: Add on-chip RTC support for SH7722.

2008-10-28T09:40:19Z

Signed-off-by: Paul Mundt

sh: sh7785 pinmux support

2008-10-23T02:59:37Z

This patch implements pinmux tables for the sh7785 processor. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt

sh: Move SH-4 CPU headers down one more level.

2008-10-20T05:30:17Z

These accidentally got placed in to cpu-sh4 instead of cpu-sh4/cpu, push them down one more level. Signed-off-by: Paul Mundt

sh: Move the CPU definition headers from asm/ to cpu/.

2008-10-20T03:04:53Z

Signed-off-by: Paul Mundt

sh: migrate to arch/sh/include/

2008-07-28T23:09:44Z

This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg Signed-off-by: Paul Mundt