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<title>kernel.git/arch/sh/include/asm/system.h, branch linux-2.6.34.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.34.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.34.y'/>
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<updated>2010-02-12T06:40:00Z</updated>
<entry>
<title>sh: Isolate uncached mapping support.</title>
<updated>2010-02-12T06:40:00Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2010-02-12T06:40:00Z</published>
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<id>urn:sha1:b0f3ae03aca0f331b851ae94bc066124e7f104df</id>
<content type='text'>
This splits out the uncached mapping support under its own config option,
presently only used by 29-bit mode and 32-bit + PMB. This will make it
possible to optionally add an uncached mapping on sh64 as well as booting
without an uncached mapping for 32-bit.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Track the uncached mapping size.</title>
<updated>2010-01-21T06:54:31Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2010-01-21T06:54:31Z</published>
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<id>urn:sha1:3125ee72dca25fc2157dcddd07e2d740db921fc4</id>
<content type='text'>
This provides a variable for tracking the uncached mapping size, and uses
it for pretty printing the uncached lowmem range. Beyond this, we'll also
be building on top of this for figuring out from where the remainder of
P2 becomes usable when constructing unrelated mappings.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: machine_ops based reboot support.</title>
<updated>2010-01-20T07:42:52Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2010-01-20T07:42:52Z</published>
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<id>urn:sha1:fbb82b03653cdb7fd1863b911e7540011259d2ce</id>
<content type='text'>
This provides a machine_ops-based reboot interface loosely cloned from
x86, and converts the native sh32 and sh64 cases over to it.

Necessary both for tying in SMP support and also enabling platforms like
SDK7786 to add support for their microcontroller-based power managers.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>Merge branches 'sh/xstate', 'sh/hw-breakpoints' and 'sh/stable-updates'</title>
<updated>2010-01-13T04:02:55Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2010-01-13T04:02:55Z</published>
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<id>urn:sha1:644755e7867710a23e6243dcc69cfc071985f560</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sh: Don't perform an icbi on a P2 address</title>
<updated>2010-01-13T03:59:24Z</updated>
<author>
<name>Matt Fleming</name>
</author>
<published>2010-01-13T03:59:24Z</published>
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<id>urn:sha1:6430a5987f8bb9a7c5187b343956aa8ef404d571</id>
<content type='text'>
The legacy P2 area may not always be mapped (for example when using
PMB). So perform an icbi on an address that we know will always be
mapped.

Signed-off-by: Matt Fleming &lt;matt@console-pimps.org&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' into sh/hw-breakpoints</title>
<updated>2009-12-08T06:47:12Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2009-12-08T06:47:12Z</published>
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<id>urn:sha1:6424db52e24e8cdf89917fa3c10395116440160e</id>
<content type='text'>
Conflict between FPU thread flag migration and debug
thread flag addition.

Conflicts:
	arch/sh/include/asm/thread_info.h
	arch/sh/include/asm/ubc.h
	arch/sh/kernel/process_32.c
</content>
</entry>
<entry>
<title>sh: hw-breakpoints: Add preliminary support for SH-4A UBC.</title>
<updated>2009-12-08T06:02:27Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2009-11-09T07:27:40Z</published>
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<id>urn:sha1:09a072947791088b88ae15111cf68fc5aaaf758d</id>
<content type='text'>
This adds preliminary support for the SH-4A UBC to the hw-breakpoints API.
Presently only a single channel is implemented, and the ptrace interface
still needs to be converted. This is the first step to cleaning up the
long-standing UBC mess, making the UBC more generally accessible, and
finally making it SMP safe.

An additional abstraction will be layered on top of this as with the perf
events code to permit the various CPU families to wire up support for
their own specific UBCs, as many variations exist.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh64: Fix up the CONFIG_GENERIC_BUG=n build.</title>
<updated>2009-11-12T07:39:47Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2009-11-12T07:39:47Z</published>
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<id>urn:sha1:626ac8e1388ac128495a3b7188e9d86464de6c5b</id>
<content type='text'>
sh64 doesn't use GENERIC_BUG, which presently causes the handle_BUG()
code to blow up. Fix up the dependencies and get it all building again.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: nmi_debug support.</title>
<updated>2009-09-01T08:38:32Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2009-09-01T08:38:32Z</published>
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<id>urn:sha1:1e1030dccb1084c8a38976d3656aab1d50d762da</id>
<content type='text'>
This implements support for NMI debugging that was shamelessly copied
from the avr32 port. A bit of special magic is needed in the interrupt
exception path given that the NMI exception handler is stubbed in to the
regular exception handling table despite being reported in INTEVT. So we
mangle the lookup and kick off an EXPEVT-style exception dispatch from
the INTEVT path for exceptions that do_IRQ() has no chance of handling.
As a result, we also drop the evt2irq() conversion from the do_IRQ() path
and just do it in assembly.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' into sh/smp</title>
<updated>2009-09-01T04:54:14Z</updated>
<author>
<name>Paul Mundt</name>
</author>
<published>2009-09-01T04:54:14Z</published>
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<id>urn:sha1:ac6a0cf6716bb46813d0161024c66c2af66e53d1</id>
<content type='text'>
Conflicts:
	arch/sh/mm/cache-sh4.c
</content>
</entry>
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