<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/riscv, branch linux-6.0.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.0.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.0.y'/>
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<updated>2023-01-12T11:00:47Z</updated>
<entry>
<title>riscv, kprobes: Stricter c.jr/c.jalr decoding</title>
<updated>2023-01-12T11:00:47Z</updated>
<author>
<name>Björn Töpel</name>
</author>
<published>2023-01-02T16:07:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1ce70a9ef9c63c08b89ab2d1d8428f4d254a30c5'/>
<id>urn:sha1:1ce70a9ef9c63c08b89ab2d1d8428f4d254a30c5</id>
<content type='text'>
commit b2d473a6019ef9a54b0156ecdb2e0398c9fa6a24 upstream.

In the compressed instruction extension, c.jr, c.jalr, c.mv, and c.add
is encoded the following way (each instruction is 16b):

---+-+-----------+-----------+--
100 0 rs1[4:0]!=0       00000 10 : c.jr
100 1 rs1[4:0]!=0       00000 10 : c.jalr
100 0  rd[4:0]!=0 rs2[4:0]!=0 10 : c.mv
100 1  rd[4:0]!=0 rs2[4:0]!=0 10 : c.add

The following logic is used to decode c.jr and c.jalr:

  insn &amp; 0xf007 == 0x8002 =&gt; instruction is an c.jr
  insn &amp; 0xf007 == 0x9002 =&gt; instruction is an c.jalr

When 0xf007 is used to mask the instruction, c.mv can be incorrectly
decoded as c.jr, and c.add as c.jalr.

Correct the decoding by changing the mask from 0xf007 to 0xf07f.

Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
Signed-off-by: Björn Töpel &lt;bjorn@rivosinc.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Link: https://lore.kernel.org/r/20230102160748.1307289-1-bjorn@kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>riscv: uaccess: fix type of 0 variable on error in get_user()</title>
<updated>2023-01-12T11:00:47Z</updated>
<author>
<name>Ben Dooks</name>
</author>
<published>2022-12-29T17:05:45Z</published>
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<id>urn:sha1:a7652ec673316ee3085c8eb77fc589ee00e6b96a</id>
<content type='text'>
commit b9b916aee6715cd7f3318af6dc360c4729417b94 upstream.

If the get_user(x, ptr) has x as a pointer, then the setting
of (x) = 0 is going to produce the following sparse warning,
so fix this by forcing the type of 'x' when access_ok() fails.

fs/aio.c:2073:21: warning: Using plain integer as NULL pointer

Signed-off-by: Ben Dooks &lt;ben-linux@fluff.org&gt;
Reviewed-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20221229170545.718264-1-ben-linux@fluff.org
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>riscv: mm: notify remote harts about mmu cache updates</title>
<updated>2023-01-07T10:15:57Z</updated>
<author>
<name>Sergey Matyukevich</name>
</author>
<published>2022-08-29T20:52:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5527b42ef89e710b84c95747fe26c3e8757813d8'/>
<id>urn:sha1:5527b42ef89e710b84c95747fe26c3e8757813d8</id>
<content type='text'>
commit 4bd1d80efb5af640f99157f39b50fb11326ce641 upstream.

Current implementation of update_mmu_cache function performs local TLB
flush. It does not take into account ASID information. Besides, it does
not take into account other harts currently running the same mm context
or possible migration of the running context to other harts. Meanwhile
TLB flush is not performed for every context switch if ASID support
is enabled.

Patch [1] proposed to add ASID support to update_mmu_cache to avoid
flushing local TLB entirely. This patch takes into account other
harts currently running the same mm context as well as possible
migration of this context to other harts.

For this purpose the approach from flush_icache_mm is reused. Remote
harts currently running the same mm context are informed via SBI calls
that they need to flush their local TLBs. All the other harts are marked
as needing a deferred TLB flush when this mm context runs on them.

[1] https://lore.kernel.org/linux-riscv/20220821013926.8968-1-tjytimi@163.com/

Signed-off-by: Sergey Matyukevich &lt;sergey.matyukevich@syntacore.com&gt;
Fixes: 65d4b9c53017 ("RISC-V: Implement ASID allocator")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/linux-riscv/20220829205219.283543-1-geomatsi@gmail.com/#t
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>riscv: stacktrace: Fixup ftrace_graph_ret_addr retp argument</title>
<updated>2023-01-07T10:15:57Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2022-11-09T06:49:36Z</published>
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<id>urn:sha1:a1f4700f214259292f961bc1754794c6f2e913bd</id>
<content type='text'>
commit 5c3022e4a616d800cf5f4c3a981d7992179e44a1 upstream.

The 'retp' is a pointer to the return address on the stack, so we
must pass the current return address pointer as the 'retp'
argument to ftrace_push_return_trace(). Not parent function's
return address on the stack.

Fixes: b785ec129bd9 ("riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR support")
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Link: https://lore.kernel.org/r/20221109064937.3643993-2-guoren@kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: kexec: Fix memory leak of elf header buffer</title>
<updated>2023-01-07T10:15:57Z</updated>
<author>
<name>Li Huafei</name>
</author>
<published>2022-11-04T09:56:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=090bfcfc9f14d05154893c67eeaecc56e894fbae'/>
<id>urn:sha1:090bfcfc9f14d05154893c67eeaecc56e894fbae</id>
<content type='text'>
commit cbc32023ddbdf4baa3d9dc513a2184a84080a5a2 upstream.

This is reported by kmemleak detector:

unreferenced object 0xff2000000403d000 (size 4096):
  comm "kexec", pid 146, jiffies 4294900633 (age 64.792s)
  hex dump (first 32 bytes):
    7f 45 4c 46 02 01 01 00 00 00 00 00 00 00 00 00  .ELF............
    04 00 f3 00 01 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [&lt;00000000566ca97c&gt;] kmemleak_vmalloc+0x3c/0xbe
    [&lt;00000000979283d8&gt;] __vmalloc_node_range+0x3ac/0x560
    [&lt;00000000b4b3712a&gt;] __vmalloc_node+0x56/0x62
    [&lt;00000000854f75e2&gt;] vzalloc+0x2c/0x34
    [&lt;00000000e9a00db9&gt;] crash_prepare_elf64_headers+0x80/0x30c
    [&lt;0000000067e8bf48&gt;] elf_kexec_load+0x3e8/0x4ec
    [&lt;0000000036548e09&gt;] kexec_image_load_default+0x40/0x4c
    [&lt;0000000079fbe1b4&gt;] sys_kexec_file_load+0x1c4/0x322
    [&lt;0000000040c62c03&gt;] ret_from_syscall+0x0/0x2

In elf_kexec_load(), a buffer is allocated via vzalloc() to store elf
headers.  While it's not freed back to system when kdump kernel is
reloaded or unloaded, or when image-&gt;elf_header is successfully set and
then fails to load kdump kernel for some reason. Fix it by freeing the
buffer in arch_kimage_file_post_load_cleanup().

Fixes: 8acea455fafa ("RISC-V: Support for kexec_file on panic")
Signed-off-by: Li Huafei &lt;lihuafei1@huawei.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20221104095658.141222-2-lihuafei1@huawei.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>riscv: Fixup compile error with !MMU</title>
<updated>2023-01-07T10:15:57Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2022-12-07T09:11:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=624cb0b1581a2550f881a6b1ae39f0b5d573cfe3'/>
<id>urn:sha1:624cb0b1581a2550f881a6b1ae39f0b5d573cfe3</id>
<content type='text'>
commit c528ef0888b75f673f7d48022de8d31d5b451e8c upstream.

Current nommu_virt_defconfig can't compile:

In file included from
arch/riscv/kernel/crash_core.c:3:
arch/riscv/kernel/crash_core.c:
In function 'arch_crash_save_vmcoreinfo':
arch/riscv/kernel/crash_core.c:8:27:
error: 'VA_BITS' undeclared (first use in this function)
    8 |         VMCOREINFO_NUMBER(VA_BITS);
      |                           ^~~~~~~

Add MMU dependency for KEXEC_FILE.

Fixes: 6261586e0c91 ("RISC-V: Add kexec_file support")
Reported-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Tested-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20221207091112.2258674-1-guoren@kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: kexec: Fix memory leak of fdt buffer</title>
<updated>2023-01-07T10:15:56Z</updated>
<author>
<name>Li Huafei</name>
</author>
<published>2022-11-04T09:56:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c66ad198b6497dee8f45d7ed5c03629c4525c7d0'/>
<id>urn:sha1:c66ad198b6497dee8f45d7ed5c03629c4525c7d0</id>
<content type='text'>
commit 96df59b1ae23f5c11698c3c2159aeb2ecd4944a4 upstream.

This is reported by kmemleak detector:

unreferenced object 0xff60000082864000 (size 9588):
  comm "kexec", pid 146, jiffies 4294900634 (age 64.788s)
  hex dump (first 32 bytes):
    d0 0d fe ed 00 00 12 ed 00 00 00 48 00 00 11 40  ...........H...@
    00 00 00 28 00 00 00 11 00 00 00 02 00 00 00 00  ...(............
  backtrace:
    [&lt;00000000f95b17c4&gt;] kmemleak_alloc+0x34/0x3e
    [&lt;00000000b9ec8e3e&gt;] kmalloc_order+0x9c/0xc4
    [&lt;00000000a95cf02e&gt;] kmalloc_order_trace+0x34/0xb6
    [&lt;00000000f01e68b4&gt;] __kmalloc+0x5c2/0x62a
    [&lt;000000002bd497b2&gt;] kvmalloc_node+0x66/0xd6
    [&lt;00000000906542fa&gt;] of_kexec_alloc_and_setup_fdt+0xa6/0x6ea
    [&lt;00000000e1166bde&gt;] elf_kexec_load+0x206/0x4ec
    [&lt;0000000036548e09&gt;] kexec_image_load_default+0x40/0x4c
    [&lt;0000000079fbe1b4&gt;] sys_kexec_file_load+0x1c4/0x322
    [&lt;0000000040c62c03&gt;] ret_from_syscall+0x0/0x2

In elf_kexec_load(), a buffer is allocated via kvmalloc() to store fdt.
While it's not freed back to system when kexec kernel is reloaded or
unloaded.  Then memory leak is caused.  Fix it by introducing riscv
specific function arch_kimage_file_post_load_cleanup(), and freeing the
buffer there.

Fixes: 6261586e0c91 ("RISC-V: Add kexec_file support")
Signed-off-by: Li Huafei &lt;lihuafei1@huawei.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Liao Chang &lt;liaochang1@huawei.com&gt;
Link: https://lore.kernel.org/r/20221104095658.141222-1-lihuafei1@huawei.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()</title>
<updated>2022-12-31T12:26:35Z</updated>
<author>
<name>Anup Patel</name>
</author>
<published>2022-12-07T03:46:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b1b3d18708526b77f97beebc89d3746cfd474e98'/>
<id>urn:sha1:b1b3d18708526b77f97beebc89d3746cfd474e98</id>
<content type='text'>
[ Upstream commit e482d9e33d5b0f222cbef7341dcd52cead6b9edc ]

The reg_val check in kvm_riscv_vcpu_set_reg_config() should only
be done for isa config register.

Fixes: 9bfd900beeec ("RISC-V: KVM: Improve ISA extension by using a bitmap")
Signed-off-by: Anup Patel &lt;apatel@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Atish Patra &lt;atishp@rivosinc.com&gt;
Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>riscv: Fix P4D_SHIFT definition for 3-level page table mode</title>
<updated>2022-12-31T12:26:23Z</updated>
<author>
<name>Alexandre Ghiti</name>
</author>
<published>2022-12-01T13:51:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8a4b096c5e182fa0043df454b336ee90dfb1ee69'/>
<id>urn:sha1:8a4b096c5e182fa0043df454b336ee90dfb1ee69</id>
<content type='text'>
[ Upstream commit 71fc3621efc38ace9640ee6a0db3300900689592 ]

RISC-V kernels support 3,4,5-level page tables at runtime by folding
upper levels.

In case of a 3-level page table, PGDIR is folded into P4D which in turn
is folded into PUD: PGDIR_SHIFT value is correctly set to the same value
as PUD_SHIFT, but P4D_SHIFT is not, then any use of P4D_SHIFT will access
invalid address bits (all set to 1).

Fix this by dynamically defining P4D_SHIFT value, like we already do for
PGDIR_SHIFT.

Fixes: d10efa21a937 ("riscv: mm: Control p4d's folding by pgtable_l5_enabled")
Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Reviewed-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20221201135128.1482189-2-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: Align the shadow stack</title>
<updated>2022-12-31T12:26:23Z</updated>
<author>
<name>Palmer Dabbelt</name>
</author>
<published>2022-11-30T02:35:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7a270e44c9a9bd046742451e89a2abd93d96a79b'/>
<id>urn:sha1:7a270e44c9a9bd046742451e89a2abd93d96a79b</id>
<content type='text'>
[ Upstream commit b003b3b77d65133a0011ae3b7b255347438c12f6 ]

The standard RISC-V ABIs all require 16-byte stack alignment.  We're
only calling that one function on the shadow stack so I doubt it'd
result in a real issue, but might as well keep this lined up.

Fixes: 31da94c25aea ("riscv: add VMAP_STACK overflow detection")
Reviewed-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Link: https://lore.kernel.org/r/20221130023515.20217-1-palmer@rivosinc.com
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
</feed>
