<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/riscv/kernel/vdso.c, branch linux-6.0.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.0.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.0.y'/>
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<updated>2022-10-21T10:37:39Z</updated>
<entry>
<title>riscv: vdso: fix NULL deference in vdso_join_timens() when vfork</title>
<updated>2022-10-21T10:37:39Z</updated>
<author>
<name>Jisheng Zhang</name>
</author>
<published>2022-09-24T07:07:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f2419a6fbb4caf8cf3fe0ac7e4cf2e28127d04b4'/>
<id>urn:sha1:f2419a6fbb4caf8cf3fe0ac7e4cf2e28127d04b4</id>
<content type='text'>
commit a8616d2dc193b6becc36b5f3cfeaa9ac7a5762f9 upstream.

Testing tools/testing/selftests/timens/vfork_exec.c got below
kernel log:

[    6.838454] Unable to handle kernel access to user memory without uaccess routines at virtual address 0000000000000020
[    6.842255] Oops [#1]
[    6.842871] Modules linked in:
[    6.844249] CPU: 1 PID: 64 Comm: vfork_exec Not tainted 6.0.0-rc3-rt15+ #8
[    6.845861] Hardware name: riscv-virtio,qemu (DT)
[    6.848009] epc : vdso_join_timens+0xd2/0x110
[    6.850097]  ra : vdso_join_timens+0xd2/0x110
[    6.851164] epc : ffffffff8000635c ra : ffffffff8000635c sp : ff6000000181fbf0
[    6.852562]  gp : ffffffff80cff648 tp : ff60000000fdb700 t0 : 3030303030303030
[    6.853852]  t1 : 0000000000000030 t2 : 3030303030303030 s0 : ff6000000181fc40
[    6.854984]  s1 : ff60000001e6c000 a0 : 0000000000000010 a1 : ffffffff8005654c
[    6.856221]  a2 : 00000000ffffefff a3 : 0000000000000000 a4 : 0000000000000000
[    6.858114]  a5 : 0000000000000000 a6 : 0000000000000008 a7 : 0000000000000038
[    6.859484]  s2 : ff60000001e6c068 s3 : ff6000000108abb0 s4 : 0000000000000000
[    6.860751]  s5 : 0000000000001000 s6 : ffffffff8089dc40 s7 : ffffffff8089dc38
[    6.862029]  s8 : ffffffff8089dc30 s9 : ff60000000fdbe38 s10: 000000000000005e
[    6.863304]  s11: ffffffff80cc3510 t3 : ffffffff80d1112f t4 : ffffffff80d1112f
[    6.864565]  t5 : ffffffff80d11130 t6 : ff6000000181fa00
[    6.865561] status: 0000000000000120 badaddr: 0000000000000020 cause: 000000000000000d
[    6.868046] [&lt;ffffffff8008dc94&gt;] timens_commit+0x38/0x11a
[    6.869089] [&lt;ffffffff8008dde8&gt;] timens_on_fork+0x72/0xb4
[    6.870055] [&lt;ffffffff80190096&gt;] begin_new_exec+0x3c6/0x9f0
[    6.871231] [&lt;ffffffff801d826c&gt;] load_elf_binary+0x628/0x1214
[    6.872304] [&lt;ffffffff8018ee7a&gt;] bprm_execve+0x1f2/0x4e4
[    6.873243] [&lt;ffffffff8018f90c&gt;] do_execveat_common+0x16e/0x1ee
[    6.874258] [&lt;ffffffff8018f9c8&gt;] sys_execve+0x3c/0x48
[    6.875162] [&lt;ffffffff80003556&gt;] ret_from_syscall+0x0/0x2
[    6.877484] ---[ end trace 0000000000000000 ]---

This is because the mm-&gt;context.vdso_info is NULL in vfork case. From
another side, mm-&gt;context.vdso_info either points to vdso info
for RV64 or vdso info for compat, there's no need to bloat riscv's
mm_context_t, we can handle the difference when setup the additional
page for vdso.

Signed-off-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Suggested-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Fixes: 3092eb456375 ("riscv: compat: vdso: Add setup additional pages implementation")
Link: https://lore.kernel.org/r/20220924070737.3048-1-jszhang@kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>riscv: compat: Using seperated vdso_maps for compat_vdso_info</title>
<updated>2022-05-26T00:24:06Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2022-05-25T16:04:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=324373f476936b6c8d6a83086a8025a818c1b9e6'/>
<id>urn:sha1:324373f476936b6c8d6a83086a8025a818c1b9e6</id>
<content type='text'>
This is a fixup for vdso implementation which caused musl to
fail.

[   11.600082] Run /sbin/init as init process
[   11.628561] init[1]: unhandled signal 11 code 0x1 at
0x0000000000000000 in libc.so[ffffff8ad39000+a4000]
[   11.629398] CPU: 0 PID: 1 Comm: init Not tainted
5.18.0-rc7-next-20220520 #1
[   11.629462] Hardware name: riscv-virtio,qemu (DT)
[   11.629546] epc : 00ffffff8ada1100 ra : 00ffffff8ada13c8 sp :
00ffffffc58199f0
[   11.629586]  gp : 00ffffff8ad39000 tp : 00ffffff8ade0998 t0 :
ffffffffffffffff
[   11.629598]  t1 : 00ffffffc5819fd0 t2 : 0000000000000000 s0 :
00ffffff8ade0cc0
[   11.629610]  s1 : 00ffffff8ade0cc0 a0 : 0000000000000000 a1 :
00ffffffc5819a00
[   11.629622]  a2 : 0000000000000001 a3 : 000000000000001e a4 :
00ffffffc5819b00
[   11.629634]  a5 : 00ffffffc5819b00 a6 : 0000000000000000 a7 :
0000000000000000
[   11.629645]  s2 : 00ffffff8ade0ac8 s3 : 00ffffff8ade0ec8 s4 :
00ffffff8ade0728
[   11.629656]  s5 : 00ffffff8ade0a90 s6 : 0000000000000000 s7 :
00ffffffc5819e40
[   11.629667]  s8 : 00ffffff8ade0ca0 s9 : 00ffffff8addba50 s10:
0000000000000000
[   11.629678]  s11: 0000000000000000 t3 : 0000000000000002 t4 :
0000000000000001
[   11.629688]  t5 : 0000000000020000 t6 : ffffffffffffffff
[   11.629699] status: 0000000000004020 badaddr: 0000000000000000
cause: 000000000000000d

The last __vdso_init(&amp;compat_vdso_info) replaces the data in normal
vdso_info. This is an obvious bug.

Reported-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: https://lore.kernel.org/r/20220525160404.2930984-1-guoren@kernel.org
Fixes: 3092eb456375 ("riscv: compat: vdso: Add setup additional pages implementation")
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>riscv: compat: vdso: Add setup additional pages implementation</title>
<updated>2022-04-26T20:36:59Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2022-04-05T07:13:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3092eb45637573c5e435fbf5eaf9516316e5f9c6'/>
<id>urn:sha1:3092eb45637573c5e435fbf5eaf9516316e5f9c6</id>
<content type='text'>
Reconstruct __setup_additional_pages() by appending vdso info
pointer argument to meet compat_vdso_info requirement. And change
vm_special_mapping *dm, *cm initialization into static.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Tested-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://lore.kernel.org/r/20220405071314.3225832-18-guoren@kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>riscv/vdso: Add support for time namespaces</title>
<updated>2021-10-04T21:16:43Z</updated>
<author>
<name>Tong Tiangen</name>
</author>
<published>2021-09-01T03:20:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dffe11e280a42c2501e5b0cdebd85a77f539bb05'/>
<id>urn:sha1:dffe11e280a42c2501e5b0cdebd85a77f539bb05</id>
<content type='text'>
Implement generic vdso time namespace support which also enables time
namespaces for riscv. This is quite similar to what arm64 does.

selftest/timens test result:
  1..10
  ok 1 Passed for CLOCK_BOOTTIME (syscall)
  ok 2 Passed for CLOCK_BOOTTIME (vdso)
  ok 3 # SKIP CLOCK_BOOTTIME_ALARM isn't supported
  ok 4 # SKIP CLOCK_BOOTTIME_ALARM isn't supported
  ok 5 Passed for CLOCK_MONOTONIC (syscall)
  ok 6 Passed for CLOCK_MONOTONIC (vdso)
  ok 7 Passed for CLOCK_MONOTONIC_COARSE (syscall)
  ok 8 Passed for CLOCK_MONOTONIC_COARSE (vdso)
  ok 9 Passed for CLOCK_MONOTONIC_RAW (syscall)
  ok 10 Passed for CLOCK_MONOTONIC_RAW (vdso)
  # Totals: pass:8 fail:0 xfail:0 xpass:0 skip:2 error:0

Signed-off-by: Tong Tiangen &lt;tongtiangen@huawei.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv/vdso: make arch_setup_additional_pages wait for mmap_sem for write killable</title>
<updated>2021-10-02T20:42:26Z</updated>
<author>
<name>Tong Tiangen</name>
</author>
<published>2021-09-01T02:46:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8bb0ab3ae7a4dbe6cf32deb830cf2bdbf5736867'/>
<id>urn:sha1:8bb0ab3ae7a4dbe6cf32deb830cf2bdbf5736867</id>
<content type='text'>
riscv architectures relying on mmap_sem for write in their
arch_setup_additional_pages. If the waiting task gets killed by the oom
killer it would block oom_reaper from asynchronous address space reclaim
and reduce the chances of timely OOM resolving.  Wait for the lock in
the killable mode and return with EINTR if the task got killed while
waiting.

Signed-off-by: Tong Tiangen &lt;tongtiangen@huawei.com&gt;
Reviewed-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Fixes: 76d2a0493a17 ("RISC-V: Init and Halt Code")
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv/vdso: Move vdso data page up front</title>
<updated>2021-10-02T20:42:25Z</updated>
<author>
<name>Tong Tiangen</name>
</author>
<published>2021-09-01T02:46:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=78a743cd82a35ca0724179fc22834f06a2151fc2'/>
<id>urn:sha1:78a743cd82a35ca0724179fc22834f06a2151fc2</id>
<content type='text'>
As commit 601255ae3c98 ("arm64: vdso: move data page before code pages"), the
same issue exists on riscv, testcase is shown below, make sure that vdso.so is
bigger than page size,

  struct timespec tp;
  clock_gettime(5, &amp;tp);
  printf("tv_sec: %ld, tv_nsec: %ld\n", tp.tv_sec, tp.tv_nsec);

without this patch, test result : tv_sec: 0, tv_nsec: 0
   with this patch, test result : tv_sec: 1629271537, tv_nsec: 748000000

Move the vdso data page in front of the VDSO area to fix the issue.

Fixes: ad5d1122b82fb ("riscv: use vDSO common flow to reduce the latency of the time-related functions")
Signed-off-by: Tong Tiangen &lt;tongtiangen@huawei.com&gt;
Reviewed-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv/vdso: Refactor asm/vdso.h</title>
<updated>2021-10-02T20:42:23Z</updated>
<author>
<name>Tong Tiangen</name>
</author>
<published>2021-09-01T02:46:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bb4a23c994aebcd96c567a0be8e964d516bd4a61'/>
<id>urn:sha1:bb4a23c994aebcd96c567a0be8e964d516bd4a61</id>
<content type='text'>
The asm/vdso.h will be included in vdso.lds.S in the next patch, the
following cleanup is needed to avoid syntax error:

 1.the declaration of sys_riscv_flush_icache() is moved into asm/syscall.h.
 2.the definition of struct vdso_data is moved into kernel/vdso.c.
 2.the definition of VDSO_SYMBOL is placed under "#ifndef __ASSEMBLY__".

Also remove the redundant linux/types.h include.

Signed-off-by: Tong Tiangen &lt;tongtiangen@huawei.com&gt;
Reviewed-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Mark some global variables __ro_after_init</title>
<updated>2021-04-26T15:25:08Z</updated>
<author>
<name>Jisheng Zhang</name>
</author>
<published>2021-03-29T18:22:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=de31ea4a1181a8bb4d32ab74f3434f2bc2b79122'/>
<id>urn:sha1:de31ea4a1181a8bb4d32ab74f3434f2bc2b79122</id>
<content type='text'>
All of these are never modified after init, so they can be
__ro_after_init.

Signed-off-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Fixup CONFIG_GENERIC_TIME_VSYSCALL</title>
<updated>2021-01-13T04:34:44Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2021-01-02T13:24:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0aa2ec8a475fb505fd98d93bbcf4e03beeeebcb6'/>
<id>urn:sha1:0aa2ec8a475fb505fd98d93bbcf4e03beeeebcb6</id>
<content type='text'>
The patch fix commit: ad5d112 ("riscv: use vDSO common flow to
reduce the latency of the time-related functions").

The GENERIC_TIME_VSYSCALL should be CONFIG_GENERIC_TIME_VSYSCALL
or vgettimeofday won't work.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Reviewed-by: Pekka Enberg &lt;penberg@kernel.org&gt;
Fixes: ad5d1122b82f ("riscv: use vDSO common flow to reduce the latency of the time-related functions")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'riscv-for-linus-5.8-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2020-06-11T19:55:20Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2020-06-11T19:55:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cd16ed33c3c618930ccda7049dcea05ee707a9c0'/>
<id>urn:sha1:cd16ed33c3c618930ccda7049dcea05ee707a9c0</id>
<content type='text'>
Pull more RISC-V updates from Palmer Dabbelt:

 - Kconfig select statements are now sorted alphanumerically

 - first-level interrupts are now handled via a full irqchip driver

 - CPU hotplug is fixed

 - vDSO calls now use the common vDSO infrastructure

* tag 'riscv-for-linus-5.8-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: set the permission of vdso_data to read-only
  riscv: use vDSO common flow to reduce the latency of the time-related functions
  riscv: fix build warning of missing prototypes
  RISC-V: Don't mark init section as non-executable
  RISC-V: Force select RISCV_INTC for CONFIG_RISCV
  RISC-V: Remove do_IRQ() function
  clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
  irqchip: RISC-V per-HART local interrupt controller driver
  RISC-V: Rename and move plic_find_hart_id() to arch directory
  RISC-V: self-contained IPI handling routine
  RISC-V: Sort select statements alphanumerically
</content>
</entry>
</feed>
