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<title>kernel.git/arch/riscv/kernel/smp.c, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.17.y'/>
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<updated>2017-12-01T21:31:31Z</updated>
<entry>
<title>RISC-V: Fixes for clean allmodconfig build</title>
<updated>2017-12-01T21:31:31Z</updated>
<author>
<name>Palmer Dabbelt</name>
</author>
<published>2017-12-01T21:31:31Z</published>
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<id>urn:sha1:3b62de26cf5ef17340a0e986d3e53eb4f74f96d5</id>
<content type='text'>
Olaf said: Here's a short series of patches that produces a working
allmodconfig. Would be nice to see them go in so we can add build
coverage.

I've dropped patches 8 and 10 from the original set:

* [PATCH 08/10] (RISC-V: Set __ARCH_WANT_RENAMEAT to pick up generic
  version) has a better fix that I've sent out for review, we don't want
  renameat.
* [PATCH 10/10] (input: joystick: riscv has get_cycles) has already been
  taken into Dmitry Torokhov's tree.
</content>
</entry>
<entry>
<title>RISC-V: Flush I$ when making a dirty page executable</title>
<updated>2017-11-30T20:58:25Z</updated>
<author>
<name>Andrew Waterman</name>
</author>
<published>2017-10-25T21:30:32Z</published>
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<id>urn:sha1:08f051eda33b51e8ee0f45f05bcfe49d0f0caf6b</id>
<content type='text'>
The RISC-V ISA allows for instruction caches that are not coherent WRT
stores, even on a single hart.  As a result, we need to explicitly flush
the instruction cache whenever marking a dirty page as executable in
order to preserve the correct system behavior.

Local instruction caches aren't that scary (our implementations actually
flush the cache, but RISC-V is defined to allow higher-performance
implementations to exist), but RISC-V defines no way to perform an
instruction cache shootdown.  When explicitly asked to do so we can
shoot down remote instruction caches via an IPI, but this is a bit on
the slow side.

Instead of requiring an IPI to all harts whenever marking a page as
executable, we simply flush the currently running harts.  In order to
maintain correct behavior, we additionally mark every other hart as
needing a deferred instruction cache which will be taken before anything
runs on it.

Signed-off-by: Andrew Waterman &lt;andrew@sifive.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Provide stub of setup_profiling_timer()</title>
<updated>2017-11-30T18:12:15Z</updated>
<author>
<name>Olof Johansson</name>
</author>
<published>2017-11-30T01:55:17Z</published>
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<id>urn:sha1:4bde63286a6c7c76fe05ff0e03ad253f5260b104</id>
<content type='text'>
Fixes the following on allmodconfig build:

profile.c:(.text+0x3e4): undefined reference to `setup_profiling_timer'

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Init and Halt Code</title>
<updated>2017-09-26T22:26:44Z</updated>
<author>
<name>Palmer Dabbelt</name>
</author>
<published>2017-07-11T01:00:26Z</published>
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<id>urn:sha1:76d2a0493a17d4c8ecc781366850c3c4f8e1a446</id>
<content type='text'>
This contains the various __init C functions, the initial assembly
kernel entry point, and the code to reset the system.  When a file was
init-related this patch contains the entire file.

Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
</entry>
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