<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/riscv/kernel/process.c, branch linux-4.19.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.19.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.19.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2022-11-25T16:40:18Z</updated>
<entry>
<title>riscv: process: fix kernel info leakage</title>
<updated>2022-11-25T16:40:18Z</updated>
<author>
<name>Jisheng Zhang</name>
</author>
<published>2022-10-29T11:34:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c4601d30f7d989b4f354df899ab85b5f7a750d30'/>
<id>urn:sha1:c4601d30f7d989b4f354df899ab85b5f7a750d30</id>
<content type='text'>
[ Upstream commit 6510c78490c490a6636e48b61eeaa6fb65981f4b ]

thread_struct's s[12] may contain random kernel memory content, which
may be finally leaked to userspace. This is a security hole. Fix it
by clearing the s[12] array in thread_struct when fork.

As for kthread case, it's better to clear the s[12] array as well.

Fixes: 7db91e57a0ac ("RISC-V: Task implementation")
Signed-off-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Tested-by: Guo Ren &lt;guoren@kernel.org&gt;
Link: https://lore.kernel.org/r/20221029113450.4027-1-jszhang@kernel.org
Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Link: https://lore.kernel.org/r/CAJF2gTSdVyAaM12T%2B7kXAdRPGS4VyuO08X1c7paE-n4Fr8OtRA@mail.gmail.com/
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs</title>
<updated>2018-02-01T03:18:12Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2018-02-01T03:18:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=40b9672a2f071cbf931eb144997a21332bc0a747'/>
<id>urn:sha1:40b9672a2f071cbf931eb144997a21332bc0a747</id>
<content type='text'>
Pull asm/uaccess.h whack-a-mole from Al Viro:
 "It's linux/uaccess.h, damnit... Oh, well - eventually they'll stop
  cropping up..."

* 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  asm-prototypes.h: use linux/uaccess.h, not asm/uaccess.h
  riscv: use linux/uaccess.h, not asm/uaccess.h...
  ppc: for put_user() pull linux/uaccess.h, not asm/uaccess.h
</content>
</entry>
<entry>
<title>riscv: rename SR_* constants to match the spec</title>
<updated>2018-01-07T23:14:39Z</updated>
<author>
<name>Christoph Hellwig</name>
</author>
<published>2018-01-04T17:35:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1125203c13b9da32125e171b4bd75e93d4918ddd'/>
<id>urn:sha1:1125203c13b9da32125e171b4bd75e93d4918ddd</id>
<content type='text'>
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>riscv: use linux/uaccess.h, not asm/uaccess.h...</title>
<updated>2017-12-04T23:01:01Z</updated>
<author>
<name>Al Viro</name>
</author>
<published>2017-12-04T23:01:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5e454b5457b5f95c943913e619eeae1b9fb87fe6'/>
<id>urn:sha1:5e454b5457b5f95c943913e619eeae1b9fb87fe6</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>RISC-V: Task implementation</title>
<updated>2017-09-26T22:26:46Z</updated>
<author>
<name>Palmer Dabbelt</name>
</author>
<published>2017-07-11T01:04:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7db91e57a0acde126a162ababfb1e0ab190130cb'/>
<id>urn:sha1:7db91e57a0acde126a162ababfb1e0ab190130cb</id>
<content type='text'>
This patch contains the implementation of tasks on RISC-V, most of which
is involved in task switching.

Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
</content>
</entry>
</feed>
