<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/riscv/kernel/module.c, branch linux-4.19.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.19.y</id>
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<updated>2022-03-16T12:20:27Z</updated>
<entry>
<title>riscv: Fix auipc+jalr relocation range checks</title>
<updated>2022-03-16T12:20:27Z</updated>
<author>
<name>Emil Renner Berthing</name>
</author>
<published>2022-02-23T19:12:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=545b6023954601deb896b05102a1aa40a7f47dfd'/>
<id>urn:sha1:545b6023954601deb896b05102a1aa40a7f47dfd</id>
<content type='text'>
commit 0966d385830de3470b7131db8e86c0c5bc9c52dc upstream.

RISC-V can do PC-relative jumps with a 32bit range using the following
two instructions:

	auipc	t0, imm20	; t0 = PC + imm20 * 2^12
	jalr	ra, t0, imm12	; ra = PC + 4, PC = t0 + imm12

Crucially both the 20bit immediate imm20 and the 12bit immediate imm12
are treated as two's-complement signed values. For this reason the
immediates are usually calculated like this:

	imm20 = (offset + 0x800) &gt;&gt; 12
	imm12 = offset &amp; 0xfff

..where offset is the signed offset from the auipc instruction. When
the 11th bit of offset is 0 the addition of 0x800 doesn't change the top
20 bits and imm12 considered positive. When the 11th bit is 1 the carry
of the addition by 0x800 means imm20 is one higher, but since imm12 is
then considered negative the two's complement representation means it
all cancels out nicely.

However, this addition by 0x800 (2^11) means an offset greater than or
equal to 2^31 - 2^11 would overflow so imm20 is considered negative and
result in a backwards jump. Similarly the lower range of offset is also
moved down by 2^11 and hence the true 32bit range is

	[-2^31 - 2^11, 2^31 - 2^11)

Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Fixes: e2c0cdfba7f6 ("RISC-V: User-facing API")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>riscv: avoid the PIC offset of static percpu data in module beyond 2G limits</title>
<updated>2020-03-25T07:06:07Z</updated>
<author>
<name>Vincent Chen</name>
</author>
<published>2020-02-21T02:47:54Z</published>
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<id>urn:sha1:f70da80a8609748fe863069e359b87b1c6885142</id>
<content type='text'>
[ Upstream commit 0cff8bff7af886af0923d5c91776cd51603e531f ]

The compiler uses the PIC-relative method to access static variables
instead of GOT when the code model is PIC. Therefore, the limitation of
the access range from the instruction to the symbol address is +-2GB.
Under this circumstance, the kernel cannot load a kernel module if this
module has static per-CPU symbols declared by DEFINE_PER_CPU(). The reason
is that kernel relocates the .data..percpu section of the kernel module to
the end of kernel's .data..percpu. Hence, the distance between the per-CPU
symbols and the instruction will exceed the 2GB limits. To solve this
problem, the kernel should place the loaded module in the memory area
[&amp;_end-2G, VMALLOC_END].

Signed-off-by: Vincent Chen &lt;vincent.chen@sifive.com&gt;
Suggested-by: Alexandre Ghiti &lt;alex@ghiti.fr&gt;
Suggested-by: Anup Patel &lt;anup@brainfault.org&gt;
Tested-by: Alexandre Ghiti &lt;alex@ghiti.fr&gt;
Tested-by: Carlos de Paula &lt;me@carlosedp.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: Silence some module warnings on 32-bit</title>
<updated>2018-12-01T08:37:33Z</updated>
<author>
<name>Olof Johansson</name>
</author>
<published>2018-10-31T06:47:09Z</published>
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<id>urn:sha1:021e2f3fc985842d756e292b7aaa1a44a8d41fd9</id>
<content type='text'>
[ Upstream commit ef3a61406618291c46da168ff91acaa28d85944c ]

Fixes:

arch/riscv/kernel/module.c: In function 'apply_r_riscv_32_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:23:27: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_pcrel_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:104:23: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:146:23: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_got_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:190:60: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_call_plt_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:214:24: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_call_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:236:23: note: format string is defined here

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>RISC-V: Fix the rv32i kernel build</title>
<updated>2018-07-04T21:12:53Z</updated>
<author>
<name>Palmer Dabbelt</name>
</author>
<published>2018-07-04T21:12:53Z</published>
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<id>urn:sha1:9a6a51154f8be90a76f6a8ea8809115c11cec9dd</id>
<content type='text'>
These patches for building 32-bit RISC-V kernel.
 - Fix the compile errors and warnings on RV32I.
 - Fix some incompatible problem on RV32I.
 - Add format.h for compatible of print format.

The fixed width integer types format for Elf_Addr will move to
generic header by another patch. For now, there are some warning
about unexpected argument of type on RV32I.

Change in v1:
 - Fix some error in v1
 - Remove implementation of fixed width integer types format for Elf_Addr.
</content>
</entry>
<entry>
<title>RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations</title>
<updated>2018-07-04T21:12:34Z</updated>
<author>
<name>Andreas Schwab</name>
</author>
<published>2018-06-12T17:26:36Z</published>
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<id>urn:sha1:781c8fe2da3d2c7c95cd7ffddbab63b80a79da4d</id>
<content type='text'>
The R_RISCV_ADD32/R_RISCV_SUB32 relocations should add/subtract the
address of the symbol (without overflow check), not its contents.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Change variable type for 32-bit compatible</title>
<updated>2018-07-04T20:56:52Z</updated>
<author>
<name>Zong Li</name>
</author>
<published>2018-06-25T08:49:40Z</published>
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<id>urn:sha1:7df85002178e708aa749c63020fd333d9f085ced</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Handle R_RISCV_32 in modules</title>
<updated>2018-06-11T16:04:34Z</updated>
<author>
<name>Andreas Schwab</name>
</author>
<published>2018-06-07T10:27:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=77aa85de16aeefd75d639737c7bfcf0d2604e471'/>
<id>urn:sha1:77aa85de16aeefd75d639737c7bfcf0d2604e471</id>
<content type='text'>
With CONFIG_MODVERSIONS=y the R_RISCV_32 relocation is used by the
__kcrctab section.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Support SUB32 relocation type in kernel module</title>
<updated>2018-04-03T03:00:55Z</updated>
<author>
<name>Zong Li</name>
</author>
<published>2018-03-15T08:50:49Z</published>
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<id>urn:sha1:4aad074c9c1d1302c504e1a26fe434878fe08cd5</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Support ADD32 relocation type in kernel module</title>
<updated>2018-04-03T03:00:55Z</updated>
<author>
<name>Zong Li</name>
</author>
<published>2018-03-15T08:50:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8e691b16769d233f8a8b668dc7fad783459e4573'/>
<id>urn:sha1:8e691b16769d233f8a8b668dc7fad783459e4573</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: Support ALIGN relocation type in kernel module</title>
<updated>2018-04-03T03:00:55Z</updated>
<author>
<name>Zong Li</name>
</author>
<published>2018-03-15T08:50:47Z</published>
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<id>urn:sha1:29e405cd88c373ddcb3399687311aa869a7c8ee7</id>
<content type='text'>
Just fail on align type. Kernel modules loader didn't do relax
like linker, it is difficult to remove or migrate the code,
but the remnant nop instructions harm the performaace of module.
We expect the building module with the no-relax option.

Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
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