kernel.git/arch/riscv/include/uapi/asm/elf.h, branch linux-5.4.y

RISC-V: Add FP register ptrace support for gdb.

2018-10-23T00:38:04Z

Add a variable and a macro to describe FP registers, assuming only D is supported. FP code is conditional on CONFIG_FPU. The FP regs and FCSR are copied separately to avoid copying struct padding. Tested by hand and with the gdb testsuite. Signed-off-by: Jim Wilson Signed-off-by: Palmer Dabbelt

RISC-V: Add definiion of extract symbol's index and type for 32-bit

2018-07-04T20:54:08Z

Use generic marco to get the index and type of symbol. Signed-off-by: Zong Li Signed-off-by: Palmer Dabbelt

RISC-V: Add definition of relocation types

2018-04-03T03:00:56Z

Signed-off-by: Zong Li Signed-off-by: Palmer Dabbelt

RISC-V: User-facing API

2017-09-26T22:26:48Z

This patch contains code that is in some way visible to the user: including via system calls, the VDSO, module loading and signal handling. It also contains some generic code that is ABI visible. Signed-off-by: Palmer Dabbelt