<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/riscv/boot, branch linux-6.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2023-04-28T23:55:39Z</updated>
<entry>
<title>Merge tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2023-04-28T23:55:39Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-04-28T23:55:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=89d77f71f493a3663b10fa812d17f472935d24be'/>
<id>urn:sha1:89d77f71f493a3663b10fa812d17f472935d24be</id>
<content type='text'>
Pull RISC-V updates from Palmer Dabbelt:

 - Support for runtime detection of the Svnapot extension

 - Support for Zicboz when clearing pages

 - We've moved to GENERIC_ENTRY

 - Support for !MMU on rv32 systems

 - The linear region is now mapped via huge pages

 - Support for building relocatable kernels

 - Support for the hwprobe interface

 - Various fixes and cleanups throughout the tree

* tag 'riscv-for-linus-6.4-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (57 commits)
  RISC-V: hwprobe: Explicity check for -1 in vdso init
  RISC-V: hwprobe: There can only be one first
  riscv: Allow to downgrade paging mode from the command line
  dt-bindings: riscv: add sv57 mmu-type
  RISC-V: hwprobe: Remove __init on probe_vendor_features()
  riscv: Use --emit-relocs in order to move .rela.dyn in init
  riscv: Check relocations at compile time
  powerpc: Move script to check relocations at compile time in scripts/
  riscv: Introduce CONFIG_RELOCATABLE
  riscv: Move .rela.dyn outside of init to avoid empty relocations
  riscv: Prepare EFI header for relocatable kernels
  riscv: Unconditionnally select KASAN_VMALLOC if KASAN
  riscv: Fix ptdump when KASAN is enabled
  riscv: Fix EFI stub usage of KASAN instrumented strcmp function
  riscv: Move DTB_EARLY_BASE_VA to the kernel address space
  riscv: Rework kasan population functions
  riscv: Split early and final KASAN population functions
  riscv: Use PUD/P4D/PGD pages for the linear mapping
  riscv: Move the linear mapping creation in its own function
  riscv: Get rid of riscv_pfn_base variable
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2023-04-25T19:11:54Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-04-25T19:11:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d53c3eaaef6a05fec04e8b5990d97d7216eb5e42'/>
<id>urn:sha1:d53c3eaaef6a05fec04e8b5990d97d7216eb5e42</id>
<content type='text'>
Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The devicetree changes overall are again dominated by the Qualcomm
  Snapdragon platform that weighs in at over 300 changesets, but there
  are many updates across other platforms as well, notably Mediatek,
  NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
  all add new features for existing machines, as well as new machines
  and SoCs.

  The newly added SoCs are:

   - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
     chip.

   - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
     JH7100 predecessor, but with additional CPU cores and a GPU.

   - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
     added, with comparable support as its M1 predecessor.

   - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC

   - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
     the Cortex-A53 and Cortex-A73 cores, respectively.

   - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
     family.

  Including the initial board support for the added SoC platforms, there
  are 52 new machines. The largest group are 19 boards industrial
  embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
  families.

  Others include:

   - Two boards based on the Allwinner f1c200s ultra-low-cost chip

   - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
     SoC.

   - The Gl.Inet mv1000 router based on Marvell Armada 3720

   - A Wifi/LTE Dongle based on Qualcomm msm8916

   - Two robotics boards based on Qualcomm QRB chips

   - Three Snapdragon based phones made by Xiaomi

   - Five developments boards based on various Rockchip SoCs, including
     the rk3588s-khadas-edge2 and a few NanoPi models

   - The AM625 Beagleplay industrial SBC

  Another 14 machines get removed: both boards for the obsolete 'oxnas'
  platform, three boards for the Renesas r8a77950 SoC that were only for
  pre-production chips, and various chromebook models based on the
  Qualcomm Sc7180 'trogdor' design that were never part of products"

* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
  arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
  arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
  arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
  arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
  arm64: dts: apple: t8112: Add PWM controller
  arm64: dts: apple: t600x: Add PWM controller
  arm64: dts: apple: t8103: Add PWM controller
  arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
  ARM: dts: nomadik: Replace deprecated spi-gpio properties
  ARM: dts: aspeed-g6: Add UDMA node
  ARM: dts: aspeed: greatlakes: add mctp device
  ARM: dts: aspeed: greatlakes: Add gpio names
  ARM: dts: aspeed: p10bmc: Change power supply info
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
  arm64: dts: mediatek: mt6795: Add tertiary PWM node
  arm64: dts: rockchip: add panel to Anbernic RG353 series
  dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
  dt-bindings: arm: fsl: Add chargebyte Tarragon
  dt-bindings: vendor-prefixes: add chargebyte
  ...
</content>
</entry>
<entry>
<title>riscv: Use --emit-relocs in order to move .rela.dyn in init</title>
<updated>2023-04-19T14:46:33Z</updated>
<author>
<name>Alexandre Ghiti</name>
</author>
<published>2023-03-29T04:53:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=559d1e45a16dcf1542e430ea3dce9ab625be98d0'/>
<id>urn:sha1:559d1e45a16dcf1542e430ea3dce9ab625be98d0</id>
<content type='text'>
To circumvent an issue where placing the relocations inside the init
sections produces empty relocations, use --emit-relocs. But to avoid
carrying those relocations in vmlinux, use an intermediate
vmlinux.relocs file which is a copy of vmlinux *before* stripping its
relocations.

Suggested-by: Björn Töpel &lt;bjorn@kernel.org&gt;
Suggested-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Alexandre Ghiti &lt;alexghiti@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20230329045329.64565-7-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt</title>
<updated>2023-04-14T15:42:28Z</updated>
<author>
<name>Arnd Bergmann</name>
</author>
<published>2023-04-14T15:42:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8f09b5ec4177d52e9c6a32e930bc12256603c14b'/>
<id>urn:sha1:8f09b5ec4177d52e9c6a32e930bc12256603c14b</id>
<content type='text'>
- added D1 crypto node
- enabled DVFS on OrangePi PC2 board
- added GPIO line names on Nezha D1 board
- added suniv USB nodes and enabled on licheepi-nano
- new suniv boards: PopStick v1.1 and Lctech Pi
- added Allwinner T113-s DTSI
- added MangoPi MQ-R T113-s board variant
- swapped DMA names for A23, A31, A33, D1, H3, H5, V3s

* tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sun8i: v3s: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sun8i: a23/a33: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sun6i: a31: Switch dma-names order for snps,dw-apb-uart nodes
  ARM: dts: sunxi: add MangoPi MQ-R-T113 board
  dt-bindings: arm: sunxi: document MangoPi MQ-R board names
  ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi
  dts: add riscv include prefix link
  ARM: dts: suniv: Add Lctech Pi F1C200s devicetree
  ARM: dts: suniv: add device tree for PopStick v1.1
  dt-binding: arm: sunxi: add two board compatible strings
  dt-bindings: vendor-prefixes: add Source Parts and Lctech names
  ARM: dts: suniv: licheepi-nano: enable USB
  ARM: dts: suniv: add USB-related device nodes
  riscv: dts: nezha-d1: add gpio-line-names
  arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS
  riscv: dts: allwinner: d1: Add crypto engine node

Link: https://lore.kernel.org/r/20230408125156.GA17050@jernej-laptop
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes</title>
<updated>2023-04-08T12:34:29Z</updated>
<author>
<name>Cristian Ciocaltea</name>
</author>
<published>2023-03-21T21:56:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a140b18f0cc79f5c302ecedbde8364d49effa67f'/>
<id>urn:sha1:a140b18f0cc79f5c302ecedbde8364d49effa67f</id>
<content type='text'>
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma &amp;
dma-names properties") documented dma-names property to handle Allwinner
D1 dtbs_check warnings, but relies on the rx-&gt;tx ordering, which is the
reverse of what a bunch of different boards expect.

The initial proposed solution was to allow a flexible dma-names order in
the binding, due to potential ABI breakage concerns after fixing the DTS
files. But luckily the Allwinner boards are not affected, since they are
using a shared DMA channel for rx and tx.

Hence, the first step in fixing the inconsistency was to change
dma-names order in the binding to tx-&gt;rx.

Do the same for the snps,dw-apb-uart nodes in the DTS file.

Signed-off-by: Cristian Ciocaltea &lt;cristian.ciocaltea@collabora.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20230321215624.78383-7-cristian.ciocaltea@collabora.com
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next</title>
<updated>2023-04-05T21:23:17Z</updated>
<author>
<name>Conor Dooley</name>
</author>
<published>2023-04-05T21:20:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4cd4beb98fe5ac2c4bcb995ba6e82322be174abb'/>
<id>urn:sha1:4cd4beb98fe5ac2c4bcb995ba6e82322be174abb</id>
<content type='text'>
Merge Hal's series adding support for the new StarFive JH7110 SoC.
There's a few bindings here for core components that were not picked up
by the various maintainers for the subsystems (previously Palmer would
pick these up via the RISC-V tree) &amp; the first two commits in the branch
are shared with the clk tree, since the dts depends on defines in the
dt-binding headers.

This is based on -rc2, as the board does not actually boot on -rc1
due to the bug Linus introduced.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree</title>
<updated>2023-04-05T14:50:36Z</updated>
<author>
<name>Emil Renner Berthing</name>
</author>
<published>2023-04-01T11:19:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=54baba33392d428a8be4942441a92a9b05cf537e'/>
<id>urn:sha1:54baba33392d428a8be4942441a92a9b05cf537e</id>
<content type='text'>
Add a minimal device tree for StarFive JH7110 VisionFive 2 board
which has version A and version B. Support booting and basic
clock/reset/pinctrl/uart drivers.

Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Co-developed-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Signed-off-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Co-developed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: starfive: Add StarFive JH7110 pin function definitions</title>
<updated>2023-04-05T14:50:22Z</updated>
<author>
<name>Jianlong Huang</name>
</author>
<published>2023-04-01T11:19:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e22f09e598d12e46e7c96df3c10271d037e1fd39'/>
<id>urn:sha1:e22f09e598d12e46e7c96df3c10271d037e1fd39</id>
<content type='text'>
Add pin function definitions for StarFive JH7110 SoC.

Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;
Co-developed-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: starfive: Add initial StarFive JH7110 device tree</title>
<updated>2023-04-05T14:50:14Z</updated>
<author>
<name>Emil Renner Berthing</name>
</author>
<published>2023-04-01T11:19:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=60bf0a39842eb042bbdc4539285c7e524011fc2d'/>
<id>urn:sha1:60bf0a39842eb042bbdc4539285c7e524011fc2d</id>
<content type='text'>
Add initial device tree for the JH7110 RISC-V SoC by StarFive
Technology Ltd.

Tested-by: Tommaso Merciai &lt;tomm.merciai@gmail.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Co-developed-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Signed-off-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Co-developed-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
[conor: squashed in the removal of the S7's non-existent mmu]
Reviewed-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: canaan: drop invalid spi-max-frequency</title>
<updated>2023-03-26T22:58:27Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2023-03-26T16:47:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8056dc043d7f74d7675d413cb3dc4fa290609922'/>
<id>urn:sha1:8056dc043d7f74d7675d413cb3dc4fa290609922</id>
<content type='text'>
The spi-max-frequency is a property of SPI children, not the
controller:

  k210_generic.dtb: spi@50240000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
</feed>
