<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/riscv/Makefile, branch linux-5.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.13.y'/>
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<updated>2021-06-13T00:20:49Z</updated>
<entry>
<title>riscv32: Use medany C model for modules</title>
<updated>2021-06-13T00:20:49Z</updated>
<author>
<name>Khem Raj</name>
</author>
<published>2021-06-06T22:09:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5d2388dbf84adebeb6d9742164be8d32728e4269'/>
<id>urn:sha1:5d2388dbf84adebeb6d9742164be8d32728e4269</id>
<content type='text'>
When CONFIG_CMODEL_MEDLOW is used it ends up generating riscv_hi20_rela
relocations in modules which are not resolved during runtime and
following errors would be seen

[    4.802714] virtio_input: target 00000000c1539090 can not be addressed by the 32-bit offset from PC = 39148b7b
[    4.854800] virtio_input: target 00000000c1539090 can not be addressed by the 32-bit offset from PC = 9774456d

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Use -mno-relax when using lld linker</title>
<updated>2021-05-29T18:40:16Z</updated>
<author>
<name>Khem Raj</name>
</author>
<published>2021-05-14T21:37:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ec3a5cb61146c91f0f7dcec8b7e7157a4879a9ee'/>
<id>urn:sha1:ec3a5cb61146c91f0f7dcec8b7e7157a4879a9ee</id>
<content type='text'>
lld does not implement the RISCV relaxation optimizations like GNU ld
therefore disable it when building with lld, Also pass it to
assembler when using external GNU assembler ( LLVM_IAS != 1 ), this
ensures that relevant assembler option is also enabled along. if these
options are not used then we see following relocations in objects

0000000000000000 R_RISCV_ALIGN     *ABS*+0x0000000000000002

These are then rejected by lld
ld.lld: error: capability.c:(.fixup+0x0): relocation R_RISCV_ALIGN requires unimplemented linker relaxation; recompile with -mno-relax but the .o is already compiled with -mno-relax

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Reviewed-by: Nathan Chancellor &lt;nathan@kernel.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>RISC-V: enable XIP</title>
<updated>2021-04-26T15:31:28Z</updated>
<author>
<name>Vitaly Wool</name>
</author>
<published>2021-04-13T06:35:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=44c922572952d89a1ed15764f2b373ba62692865'/>
<id>urn:sha1:44c922572952d89a1ed15764f2b373ba62692865</id>
<content type='text'>
Introduce XIP (eXecute In Place) support for RISC-V platforms.
It allows code to be executed directly from non-volatile storage
directly addressable by the CPU, such as QSPI NOR flash which can
be found on many RISC-V platforms. This makes way for significant
optimization of RAM footprint. The XIP kernel is not compressed
since it has to run directly from flash, so it will occupy more
space on the non-volatile storage. The physical flash address used
to link the kernel object files and for storing it has to be known
at compile time and is represented by a Kconfig option.

XIP on RISC-V will for the time being only work on MMU-enabled
kernels.

Signed-off-by: Vitaly Wool &lt;vitaly.wool@konsulko.com&gt;
[Alex: Rebase on top of "Move kernel mapping outside the linear mapping" ]
Signed-off-by: Alexandre Ghiti &lt;alex@ghiti.fr&gt;
[Palmer: disable XIP for allyesconfig]
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Introduce alternative mechanism to apply errata solution</title>
<updated>2021-04-26T15:24:55Z</updated>
<author>
<name>Vincent Chen</name>
</author>
<published>2021-03-22T14:26:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4'/>
<id>urn:sha1:6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4</id>
<content type='text'>
Introduce the "alternative" mechanism from ARM64 and x86 to apply the CPU
vendors' errata solution at runtime. The main purpose of this patch is
to provide a framework. Therefore, the implementation is quite basic for
now so that some scenarios could not use this schemei, such as patching
code to a module, relocating the patching code and heterogeneous CPU
topology.

Users could use the macro ALTERNATIVE to apply an errata to the existing
code flow. In the macro ALTERNATIVE, users need to specify the manufacturer
information(vendorid, archid, and impid) for this errata. Therefore, kernel
will know this errata is suitable for which CPU core. During the booting
procedure, kernel will select the errata required by the CPU core and then
patch it. It means that the kernel only applies the errata to the specified
CPU core. In this case, the vendor's errata does not affect each other at
runtime. The above patching procedure only occurs during the booting phase,
so we only take the overhead of the "alternative" mechanism once.

This "alternative" mechanism is enabled by default to ensure that all
required errata will be applied. However, users can disable this feature by
the Kconfig "CONFIG_RISCV_ERRATA_ALTERNATIVE".

Signed-off-by: Vincent Chen &lt;vincent.chen@sifive.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Enable per-task stack canaries</title>
<updated>2021-01-14T23:09:10Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2020-12-17T16:29:18Z</published>
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<id>urn:sha1:fea2fed201ee5647699018a56fbb6a5e8cc053a5</id>
<content type='text'>
This enables the use of per-task stack canary values if GCC has
support for emitting the stack canary reference relative to the
value of tp, which holds the task struct pointer in the riscv
kernel.

After compare arm64 and x86 implementations, seems arm64's is more
flexible and readable. The key point is how gcc get the offset of
stack_canary from gs/el0_sp.

x86: Use a fix offset from gs, not flexible.

struct fixed_percpu_data {
	/*
	 * GCC hardcodes the stack canary as %gs:40.  Since the
	 * irq_stack is the object at %gs:0, we reserve the bottom
	 * 48 bytes of the irq stack for the canary.
	 */
	char            gs_base[40]; // :(
	unsigned long   stack_canary;
};

arm64: Use -mstack-protector-guard-offset &amp; guard-reg
	gcc options:
	-mstack-protector-guard=sysreg
	-mstack-protector-guard-reg=sp_el0
	-mstack-protector-guard-offset=xxx

riscv: Use -mstack-protector-guard-offset &amp; guard-reg
	gcc options:
	-mstack-protector-guard=tls
	-mstack-protector-guard-reg=tp
	-mstack-protector-guard-offset=xxx

 GCC's implementation has been merged:
 commit c931e8d5a96463427040b0d11f9c4352ac22b2b0
 Author: Cooper Qu &lt;cooper.qu@linux.alibaba.com&gt;
 Date:   Mon Jul 13 16:15:08 2020 +0800

     RISC-V: Add support for TLS stack protector canary access

In the end, these codes are inserted by gcc before return:

*  0xffffffe00020b396 &lt;+120&gt;:   ld      a5,1008(tp) # 0x3f0
*  0xffffffe00020b39a &lt;+124&gt;:   xor     a5,a5,a4
*  0xffffffe00020b39c &lt;+126&gt;:   mv      a0,s5
*  0xffffffe00020b39e &lt;+128&gt;:   bnez    a5,0xffffffe00020b61c &lt;_do_fork+766&gt;
   0xffffffe00020b3a2 &lt;+132&gt;:   ld      ra,136(sp)
   0xffffffe00020b3a4 &lt;+134&gt;:   ld      s0,128(sp)
   0xffffffe00020b3a6 &lt;+136&gt;:   ld      s1,120(sp)
   0xffffffe00020b3a8 &lt;+138&gt;:   ld      s2,112(sp)
   0xffffffe00020b3aa &lt;+140&gt;:   ld      s3,104(sp)
   0xffffffe00020b3ac &lt;+142&gt;:   ld      s4,96(sp)
   0xffffffe00020b3ae &lt;+144&gt;:   ld      s5,88(sp)
   0xffffffe00020b3b0 &lt;+146&gt;:   ld      s6,80(sp)
   0xffffffe00020b3b2 &lt;+148&gt;:   ld      s7,72(sp)
   0xffffffe00020b3b4 &lt;+150&gt;:   addi    sp,sp,144
   0xffffffe00020b3b6 &lt;+152&gt;:   ret
   ...
*  0xffffffe00020b61c &lt;+766&gt;:   auipc   ra,0x7f8
*  0xffffffe00020b620 &lt;+770&gt;:   jalr    -1764(ra) # 0xffffffe000a02f38 &lt;__stack_chk_fail&gt;

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Cooper Qu &lt;cooper.qu@linux.alibaba.com&gt;
Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT</title>
<updated>2021-01-14T23:09:05Z</updated>
<author>
<name>Guo Ren</name>
</author>
<published>2020-12-17T16:01:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=afc76b8b80112189b6f11e67e19cf58301944814'/>
<id>urn:sha1:afc76b8b80112189b6f11e67e19cf58301944814</id>
<content type='text'>
This patch changes the current detour mechanism of dynamic ftrace
which has been discussed during LPC 2020 RISCV-MC [1].

Before the patch, we used mcount for detour:
&lt;funca&gt;:
	addi sp,sp,-16
	sd   ra,8(sp)
	sd   s0,0(sp)
	addi s0,sp,16
	mv   a5,ra
	mv   a0,a5
	auipc ra,0x0 -&gt; nop
	jalr  -296(ra) &lt;_mcount@plt&gt; -&gt;nop
	...

After the patch, we use nop call site area for detour:
&lt;funca&gt;:
	nop -&gt; REG_S ra, -SZREG(sp)
	nop -&gt; auipc ra, 0x?
	nop -&gt; jalr ?(ra)
	nop -&gt; REG_L ra, -SZREG(sp)
	...

The mcount mechanism is mixed with gcc function prologue which is
not very clear. The patchable function entry just put 16 bytes nop
before the front of the function prologue which could be filled
with a separated detour mechanism.

[1] https://www.linuxplumbersconf.org/event/7/contributions/807/

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Use vendor name for K210 SoC support</title>
<updated>2021-01-14T23:08:46Z</updated>
<author>
<name>Damien Le Moal</name>
</author>
<published>2020-12-13T13:50:38Z</published>
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<id>urn:sha1:08734e0581a54df77f1af354b93b02ac581e4fbb</id>
<content type='text'>
Rename configuration options and directories related to the Kendryte
K210 SoC to use the SoC vendor name (canaan) instead of the "kendryte"
branding name.

Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Clean up boot dir</title>
<updated>2020-11-09T19:54:45Z</updated>
<author>
<name>Kefeng Wang</name>
</author>
<published>2020-11-04T06:15:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2c42bcbb95ec748fc84dc061b431ae4f8ae5551a'/>
<id>urn:sha1:2c42bcbb95ec748fc84dc061b431ae4f8ae5551a</id>
<content type='text'>
Let's remove all files under riscv boot dir by using archclean rule.

Signed-off-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>riscv: Fix compressed Image formats build</title>
<updated>2020-11-09T19:54:43Z</updated>
<author>
<name>Kefeng Wang</name>
</author>
<published>2020-11-04T06:14:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c18d7c17c005f4988ea2716d94d3e598eb6d5c90'/>
<id>urn:sha1:c18d7c17c005f4988ea2716d94d3e598eb6d5c90</id>
<content type='text'>
make[1]: *** No rule to make target `Image.lzma'.  Stop.

When make ARCH=riscv Image.lzma, it won't work, let's fix it.

Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kbuild-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild</title>
<updated>2020-10-22T20:13:57Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2020-10-22T20:13:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=746b25b1aa0f5736d585728ded70a8141da91edb'/>
<id>urn:sha1:746b25b1aa0f5736d585728ded70a8141da91edb</id>
<content type='text'>
Pull Kbuild updates from Masahiro Yamada:

 - Support 'make compile_commands.json' to generate the compilation
   database more easily, avoiding stale entries

 - Support 'make clang-analyzer' and 'make clang-tidy' for static checks
   using clang-tidy

 - Preprocess scripts/modules.lds.S to allow CONFIG options in the
   module linker script

 - Drop cc-option tests from compiler flags supported by our minimal
   GCC/Clang versions

 - Use always 12-digits commit hash for CONFIG_LOCALVERSION_AUTO=y

 - Use sha1 build id for both BFD linker and LLD

 - Improve deb-pkg for reproducible builds and rootless builds

 - Remove stale, useless scripts/namespace.pl

 - Turn -Wreturn-type warning into error

 - Fix build error of deb-pkg when CONFIG_MODULES=n

 - Replace 'hostname' command with more portable 'uname -n'

 - Various Makefile cleanups

* tag 'kbuild-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (34 commits)
  kbuild: Use uname for LINUX_COMPILE_HOST detection
  kbuild: Only add -fno-var-tracking-assignments for old GCC versions
  kbuild: remove leftover comment for filechk utility
  treewide: remove DISABLE_LTO
  kbuild: deb-pkg: clean up package name variables
  kbuild: deb-pkg: do not build linux-headers package if CONFIG_MODULES=n
  kbuild: enforce -Werror=return-type
  scripts: remove namespace.pl
  builddeb: Add support for all required debian/rules targets
  builddeb: Enable rootless builds
  builddeb: Pass -n to gzip for reproducible packages
  kbuild: split the build log of kallsyms
  kbuild: explicitly specify the build id style
  scripts/setlocalversion: make git describe output more reliable
  kbuild: remove cc-option test of -Werror=date-time
  kbuild: remove cc-option test of -fno-stack-check
  kbuild: remove cc-option test of -fno-strict-overflow
  kbuild: move CFLAGS_{KASAN,UBSAN,KCSAN} exports to relevant Makefiles
  kbuild: remove redundant CONFIG_KASAN check from scripts/Makefile.kasan
  kbuild: do not create built-in objects for external module builds
  ...
</content>
</entry>
</feed>
