kernel.git/arch/powerpc/sysdev/fsl_rio.c, branch linux-2.6.37.y

rapidio: fix hang on RapidIO doorbell queue full condition

2011-02-17T23:14:22Z

commit 12a4dc43911785f51a596f771ae0701b18d436f1 upstream. In fsl_rio_dbell_handler() the code currently simply acknowledges the QFI queue full interrupt, but does nothing to resolve the queue full condition. Instead, it jumps to the end of the isr. When a queue full condition occurs, the isr is then re-entered immediately and continually, forever. The fix is to just fall through and read out current doorbell entries. Signed-off-by: Thomas Taranowski Cc: Alexandre Bounine Cc: Kumar Gala Cc: Matt Porter Cc: Li Yang Cc: Thomas Moll Cc: Micha Nelissen Cc: Benjamin Herrenschmidt Cc: Grant Likely Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds Signed-off-by: Greg Kroah-Hartman

rapidio: add handling of redundant routes

2010-10-28T01:03:16Z

Detects RIO link to the already enumerated device and properly sets links between device objects. Changes to the enumeration/discovery logic: 1. Use Master Enable bit to signal end of the enumeration - agents may start their discovery process as soon as they see this bit set (Component Tag register was used before for this purpose). 2. Enumerator sets Component Tag (!= 0) immediately during device setup. This allows to identify the device if the redundant route exists in a RIO system. Signed-off-by: Alexandre Bounine Cc: Thomas Moll Cc: Matt Porter Cc: Li Yang Cc: Kumar Gala Cc: Micha Nelissen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

rapidio:powerpc/85xx: modify RIO port-write interrupt handler

2010-10-28T01:03:15Z

- Rearrange RIO port-write interrupt handling to perform message buffering as soon as possible. - Modify to disable port-write controller when clearing Transaction Error (TE) bit. Signed-off-by: Alexandre Bounine Cc: Thomas Moll Cc: Matt Porter Cc: Li Yang Cc: Kumar Gala Cc: Micha Nelissen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

fsl_rio: Add comments for sRIO registers.

2010-10-14T06:02:38Z

Add some comments to make sRIO registers map better readable. Signed-off-by: Shaohui Xie Signed-off-by: Kumar Gala

fsl_rio: fix compile errors

2010-08-31T21:24:57Z

Fixes the following compile problem on E500 platforms: arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception': arch/powerpc/sysdev/fsl_rio.c:248: error: 'MCSR_MASK' undeclared (first use in this function) Also fixes the compile problem on non-E500 platforms. Signed-off-by: Li Yang Signed-off-by: Kumar Gala

of/device: Replace struct of_device with struct platform_device

2010-08-06T15:25:50Z

of_device is just an alias for platform_device, so remove it entirely. Also replace to_of_device() with to_platform_device() and update comment blocks. This patch was initially generated from the following semantic patch, and then edited by hand to pick up the bits that coccinelle didn't catch. @@ @@ -struct of_device +struct platform_device Signed-off-by: Grant Likely Reviewed-by: David S. Miller

powerpc: remove references to of_device and to_of_device

2010-07-24T15:58:21Z

of_device is just a #define alias to platform_device. This patch replaces all references to it with platform_device. Signed-off-by: Grant Likely

of/powerpc: fix 85xx RapidIO device node pointer

2010-06-02T07:41:37Z

Fixes bug introduced by commit 61c7a080a5a061c976988fd4b844dfb468dda255 (of: Always use 'struct device.of_node' to get device node pointer) Signed-off-by: Alexandre Bounine Signed-off-by: Grant Likely

rapidio: fix maintenance access to higher memory areas

2010-05-27T16:12:51Z

Fix the maintenance access functions to farend RapidIO devices. 1. Fixed shift of the given offset, to open the maintenance window 2. Mask offset to limit access to the opened maintenance window 3. Added extended destid part to rowtear register, required for 16bit mode This method is matching maintenance transactions generation described by Freescale in the appnote AN2932. With this modification full access to a 16MB maintenance window is possible, this patch is required for IDT cps switches. For easier handling of the access routines, the access was limited to aligned memory regions. This should be no problem because all registers are 32bit wide. Signed-off-by: Thomas Moll Tested-by: Alexandre Bounine Cc: Matt Porter Cc: Li Yang Cc: Kumar Gala Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

rapidio, powerpc/85xx: Add MChk handler for SRIO port

2010-05-27T16:12:51Z

Add Machine Check exception handling into RapidIO port driver for Freescale SoCs (MPC85xx). Signed-off-by: Alexandre Bounine Tested-by: Thomas Moll Cc: Matt Porter Cc: Li Yang Cc: Kumar Gala Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds