kernel.git/arch/powerpc/lib/sstep.c, branch linux-4.10.y

powerpc: Emulation support for load/store instructions on LE

2017-03-18T11:18:39Z

commit e148bd17f48bd17fca2f4f089ec879fa6e47e34c upstream. emulate_step() uses a number of underlying kernel functions that were initially not enabled for LE. This has been rectified since. So, fix emulate_step() for LE for the corresponding instructions. Reported-by: Anton Blanchard Signed-off-by: Ravi Bangoria Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman

Replace with globally

2016-12-24T19:46:01Z

This was entirely automated, using the script by Al: PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*' sed -i -e "s!$PATT!#include !" \ $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h) to do the replacement at the end of the merge window. Requested-by: Al Viro Signed-off-by: Linus Torvalds

powerpc/lib: Fix randconfig build failure in sstep.c

2016-11-18T11:40:42Z

Under some configs we need to explicitly include cpu_has_feature.h, otherwise we fail with: arch/powerpc/lib/sstep.c:1992:7: error: implicit declaration of function 'cpu_has_feature' Signed-off-by: Michael Ellerman

powerpc: EX_TABLE macro for exception tables

2016-11-14T00:11:51Z

This macro is taken from s390, and allows more flexibility in changing exception table format. mpe: Put it in ppc_asm.h and only define one version using stringinfy_in_c(). Add some empty definitions and headers to keep the selftests happy. Signed-off-by: Nicholas Piggin Signed-off-by: Michael Ellerman

powerpc/sstep: Fix emulation fall-through

2016-05-11T11:54:08Z

There is a switch fallthough in instr_analyze() which can cause an invalid instruction to be emulated as a different, valid, instruction. The rld* (opcode 30) case extracts a sub-opcode from bits 3:1 of the instruction word. However, the only valid values of this field are 001 and 000. These cases are correctly handled, but the others are not which causes execution to fall through into case 31. Breaking out of the switch causes the instruction to be marked as unknown and allows the caller to deal with the invalid instruction in a manner consistent with other invalid instructions. Signed-off-by: Oliver O'Halloran Signed-off-by: Michael Ellerman

powerpc/sstep: Fix sstep.c compile on powerpcspe

2016-05-11T11:54:07Z

Commit be96f63375a1 ("powerpc: Split out instruction analysis part of emulate_step()") introduced ldarx and stdcx into the instructions in sstep.c, which are not accepted by the assembler on powerpcspe, but does seem to be accepted by the normal powerpc assembler even in 32 bit mode. Wrap these two instructions in a __powerpc64__ check like it is everywhere else in the file. Fixes: be96f63375a1 ("powerpc: Split out instruction analysis part of emulate_step()") Signed-off-by: Len Sorensen Signed-off-by: Michael Ellerman

powerpc: Fix compilation of emulate_step()

2014-11-12T04:54:29Z

Commit be96f63375a1 ("powerpc: Split out instruction analysis part of emulate_step()") added some calls to do_fp_load() and do_fp_store(), which fail to compile on configs with CONFIG_PPC_FPU=n and CONFIG_PPC_EMULATE_SSTEP=y. This fixes the compile by adding #ifdef CONFIG_PPC_FPU around the code that calls these functions. Signed-off-by: Paul Mackerras Signed-off-by: Michael Ellerman

powerpc: Implement emulation of string loads and stores

2014-09-25T13:14:52Z

The size field of the op.type word is now the total number of bytes to be loaded or stored. Signed-off-by: Paul Mackerras Signed-off-by: Michael Ellerman

powerpc: Emulate icbi, mcrf and conditional-trap instructions

2014-09-25T13:14:51Z

This extends the instruction emulation done by analyse_instr() and emulate_step() to handle a few more instructions that are found in the kernel. Signed-off-by: Paul Mackerras Signed-off-by: Michael Ellerman

powerpc: Split out instruction analysis part of emulate_step()

2014-09-25T13:14:51Z

This splits out the instruction analysis part of emulate_step() into a separate analyse_instr() function, which decodes the instruction, but doesn't execute any load or store instructions. It does execute integer instructions and branches which can be executed purely by updating register values in the pt_regs struct. For other instructions, it returns the instruction type and other details in a new instruction_op struct. emulate_step() then uses that information to execute loads, stores, cache operations, mfmsr, mtmsr[d], and (on 64-bit) sc instructions. The reason for doing this is so that the KVM code can use it instead of having its own separate instruction emulation code. Possibly the alignment interrupt handler could also use this. Signed-off-by: Paul Mackerras Signed-off-by: Michael Ellerman