kernel.git/arch/powerpc/kvm, branch linux-3.8.y

kvm/powerpc/e500mc: fix tlb invalidation on cpu migration

2013-04-25T19:51:08Z

commit c5e6cb051c5f7d56f05bd6a4af22cb300a4ced79 upstream. The existing check handles the case where we've migrated to a different core than we last ran on, but it doesn't handle the case where we're still on the same cpu we last ran on, but some other vcpu has run on this cpu in the meantime. Without this, guest segfaults (and other misbehavior) have been seen in smp guests. Signed-off-by: Scott Wood Signed-off-by: Alexander Graf Signed-off-by: Greg Kroah-Hartman

powerpc: Rename USER_ESID_BITS* to ESID_BITS*

2013-03-20T20:10:55Z

commit af81d7878c641629f2693ae3fdaf74b4af14dfca upstream. Now we use ESID_BITS of kernel address to build proto vsid. So rename USER_ESIT_BITS to ESID_BITS Acked-by: Paul Mackerras Signed-off-by: Aneesh Kumar K.V Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Greg Kroah-Hartman

KVM: PPC: Emulate dcbf

2013-01-17T23:40:49Z

Guests can trigger MMIO exits using dcbf. Since we don't emulate cache incoherent MMIO, just do nothing and move on. Reported-by: Ben Collins Signed-off-by: Alexander Graf Tested-by: Ben Collins CC: stable@vger.kernel.org

KVM: PPC: Book3S HV: Fix compilation without CONFIG_PPC_POWERNV

2013-01-06T13:02:00Z

Fixes this build breakage: arch/powerpc/kvm/book3s_hv_ras.c: In function ‘kvmppc_realmode_mc_power7’: arch/powerpc/kvm/book3s_hv_ras.c:126:23: error: ‘struct paca_struct’ has no member named ‘opal_mc_evt’ Signed-off-by: Andreas Schwab Signed-off-by: Alexander Graf

KVM: PPC: booke: Get/set guest EPCR register using ONE_REG interface

2012-12-06T00:34:20Z

Implement ONE_REG interface for EPCR register adding KVM_REG_PPC_EPCR to the list of ONE_REG PPC supported registers. Signed-off-by: Mihai Caraman [agraf: remove HV dependency, use get/put_user] Signed-off-by: Alexander Graf

KVM: PPC: bookehv: Add EPCR support in mtspr/mfspr emulation

2012-12-06T00:34:19Z

Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined only for 64-bit and HV categories, we will expose it at this point only to 64-bit virtual processors running on 64-bit HV hosts. Define a reusable setter function for vcpu's EPCR. Signed-off-by: Mihai Caraman [agraf: move HV dependency in the code] Signed-off-by: Alexander Graf

KVM: PPC: bookehv: Add guest computation mode for irq delivery

2012-12-06T00:34:18Z

When delivering guest IRQs, update MSR computation mode according to guest interrupt computation mode found in EPCR. Signed-off-by: Mihai Caraman [agraf: remove HV dependency in the code] Signed-off-by: Alexander Graf

KVM: PPC: booke: Extend MAS2 EPN mask for 64-bit

2012-12-06T00:34:15Z

Extend MAS2 EPN mask to retain most significant bits on 64-bit hosts. Use this mask in tlb effective address accessor. Signed-off-by: Mihai Caraman Signed-off-by: Alexander Graf

KVM: PPC: e500: Mask MAS2 EPN high 32-bits in 32/64 tlbwe emulation

2012-12-06T00:34:14Z

Mask high 32 bits of MAS2's effective page number in tlbwe emulation for guests running in 32-bit mode. Signed-off-by: Mihai Caraman Signed-off-by: Alexander Graf

KVM: PPC: e500: Add emulation helper for getting instruction ea

2012-12-06T00:34:12Z

Add emulation helper for getting instruction ea and refactor tlb instruction emulation to use it. Signed-off-by: Mihai Caraman [agraf: keep rt variable around] Signed-off-by: Alexander Graf