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<title>kernel.git/arch/powerpc/kernel/uprobes.c, branch linux-rolling-stable</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-rolling-stable</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-rolling-stable'/>
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<updated>2022-05-05T14:00:20Z</updated>
<entry>
<title>powerpc: Reject probes on instructions that can't be single stepped</title>
<updated>2022-05-05T14:00:20Z</updated>
<author>
<name>Naveen N. Rao</name>
</author>
<published>2022-03-30T14:07:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=54cdacd7d3b3c1a8dc10965f56c8b5eb8eda1a33'/>
<id>urn:sha1:54cdacd7d3b3c1a8dc10965f56c8b5eb8eda1a33</id>
<content type='text'>
Per the ISA, a Trace interrupt is not generated for:
- [h|u]rfi[d]
- rfscv
- sc, scv, and Trap instructions that trap
- Power-Saving Mode instructions
- other instructions that cause interrupts (other than Trace interrupts)
- the first instructions of any interrupt handler (applies to Branch and Single Step tracing;
CIABR matches may still occur)
- instructions that are emulated by software

Add a helper to check for instructions belonging to the first four
categories above and to reject kprobes, uprobes and xmon breakpoints on
such instructions. We reject probing on instructions belonging to these
categories across all ISA versions and across both BookS and BookE.

For trap instructions, we can't know in advance if they can cause a
trap, and there is no good reason to allow probing on those. Also,
uprobes already refuses to probe trap instructions and kprobes does not
allow probes on trap instructions used for kernel warnings and bugs. As
such, stop allowing any type of probes/breakpoints on trap instruction
across uprobes, kprobes and xmon.

For some of the fp/altivec instructions that can generate an interrupt
and which we emulate in the kernel (altivec assist, for example), we
check and turn off single stepping in emulate_single_step().

Instructions generating a DSI are restarted and single stepping normally
completes once the instruction is completed.

In uprobes, if a single stepped instruction results in a non-fatal
signal to be delivered to the task, such signals are "delayed" until
after the instruction completes. For fatal signals, single stepping is
cancelled and the instruction restarted in-place so that core dump
captures proper addresses.

In kprobes, we do not allow probes on instructions having an extable
entry and we also do not allow probing interrupt vectors.

Signed-off-by: Naveen N. Rao &lt;naveen.n.rao@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/f56ee979d50b8711fae350fc97870f3ca34acd75.1648648712.git.naveen.n.rao@linux.vnet.ibm.com

</content>
</entry>
<entry>
<title>powerpc/64s: avoid reloading (H)SRR registers if they are still valid</title>
<updated>2021-06-24T14:06:55Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-06-17T15:51:03Z</published>
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<id>urn:sha1:59dc5bfca0cb6a29db1a50847684eb5c19f8f400</id>
<content type='text'>
When an interrupt is taken, the SRR registers are set to return to where
it left off. Unless they are modified in the meantime, or the return
address or MSR are modified, there is no need to reload these registers
when returning from interrupt.

Introduce per-CPU flags that track the validity of SRR and HSRR
registers. These are cleared when returning from interrupt, when
using the registers for something else (e.g., OPAL calls), when
adjusting the return address or MSR of a context, and when context
switching (which changes the return address and MSR).

This improves the performance of interrupt returns.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
[mpe: Fold in fixup patch from Nick]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210617155116.2167984-5-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc: Don't use 'struct ppc_inst' to reference instruction location</title>
<updated>2021-06-16T14:09:00Z</updated>
<author>
<name>Christophe Leroy</name>
</author>
<published>2021-05-20T13:50:45Z</published>
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<id>urn:sha1:69d4d6e5fd9f4e805280ad831932c3df7b9d7cc7</id>
<content type='text'>
'struct ppc_inst' is an internal representation of an instruction, but
in-memory instructions are and will remain a table of 'u32' forever.

Replace all 'struct ppc_inst *' used for locating an instruction in
memory by 'u32 *'. This removes a lot of undue casts to 'struct
ppc_inst *'.

It also helps locating ab-use of 'struct ppc_inst' dereference.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
[mpe: Fix ppc_inst_next(), use u32 instead of unsigned int]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/7062722b087228e42cbd896e39bfdf526d6a340a.1621516826.git.christophe.leroy@csgroup.eu
</content>
</entry>
<entry>
<title>powerpc: Do not dereference code as 'struct ppc_inst' (uprobe, code-patching, feature-fixups)</title>
<updated>2021-06-16T13:35:57Z</updated>
<author>
<name>Christophe Leroy</name>
</author>
<published>2021-05-20T13:50:42Z</published>
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<id>urn:sha1:18c85964b10b7b78a5cb59a4959a5f82fdc77e4c</id>
<content type='text'>
'struct ppc_inst' is an internal structure to represent an instruction,
it is not directly the representation of that instruction in text code.
It is not meant to map and dereference code.

Dereferencing code directly through 'struct ppc_inst' has two main issues:
- On powerpc, structs are expected to be 8 bytes aligned while code is
spread every 4 byte.
- Should a non prefixed instruction lie at the end of the page and the
following page not be mapped, it would generate a page fault.

In-memory code must be accessed with ppc_inst_read().

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/c9a1201dd0a66b4a0f91f0fb46d9385cbf030feb.1621516826.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc/uprobes: Validation for prefixed instruction</title>
<updated>2021-03-29T01:52:24Z</updated>
<author>
<name>Ravi Bangoria</name>
</author>
<published>2021-03-11T09:15:38Z</published>
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<id>urn:sha1:d943bc742a6aabc578b6b62a713ceedf8bf16623</id>
<content type='text'>
As per ISA 3.1, prefixed instruction should not cross 64-byte
boundary. So don't allow Uprobe on such prefixed instruction.

There are two ways probed instruction is changed in mapped pages.
First, when Uprobe is activated, it searches for all the relevant
pages and replace instruction in them. In this case, if that probe
is on the 64-byte unaligned prefixed instruction, error out
directly. Second, when Uprobe is already active and user maps a
relevant page via mmap(), instruction is replaced via mmap() code
path. But because Uprobe is invalid, entire mmap() operation can
not be stopped. In this case just print an error and continue.

Signed-off-by: Ravi Bangoria &lt;ravi.bangoria@linux.ibm.com&gt;
Acked-by: Naveen N. Rao &lt;naveen.n.rao@linux.vnet.ibm.com&gt;
Acked-by: Sandipan Das &lt;sandipan@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210311091538.368590-1-ravi.bangoria@linux.ibm.com
</content>
</entry>
<entry>
<title>powerpc: fix -Wimplicit-fallthrough</title>
<updated>2020-11-18T20:18:09Z</updated>
<author>
<name>Nick Desaulniers</name>
</author>
<published>2020-11-16T04:35:32Z</published>
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<id>urn:sha1:49a41365052849be798716b374fabd436cce3ad0</id>
<content type='text'>
The "fallthrough" pseudo-keyword was added as a portable way to denote
intentional fallthrough. Clang will still warn on cases where there is a
fallthrough to an immediate break. Add explicit breaks for those cases.

Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Tested-by: Nathan Chancellor &lt;natechancellor@gmail.com&gt;
Reviewed-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
Reviewed-by: Miguel Ojeda &lt;ojeda@kernel.org&gt;
Reviewed-by: Nathan Chancellor &lt;natechancellor@gmail.com&gt;
Acked-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://github.com/ClangBuiltLinux/linux/issues/236
Signed-off-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Add ppc_inst_next()</title>
<updated>2020-05-26T13:36:51Z</updated>
<author>
<name>Michael Ellerman</name>
</author>
<published>2020-05-22T13:33:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c5ff46d69c410f7fac173e4fde3eea484b4b4eda'/>
<id>urn:sha1:c5ff46d69c410f7fac173e4fde3eea484b4b4eda</id>
<content type='text'>
In a few places we want to calculate the address of the next
instruction. Previously that was simple, we just added 4 bytes, or if
using a u32 * we incremented that pointer by 1.

But prefixed instructions make it more complicated, we need to advance
by either 4 or 8 bytes depending on the actual instruction. We also
can't do pointer arithmetic using struct ppc_inst, because it is
always 8 bytes in size on 64-bit, even though we might only need to
advance by 4 bytes.

So add a ppc_inst_next() helper which calculates the location of the
next instruction, if the given instruction was located at the given
address. Note the instruction doesn't need to actually be at the
address in memory.

Although it would seem natural for the value to be passed by value,
that makes it too easy to write a loop that will read off the end of a
page, eg:

	for (; src &lt; end; src = ppc_inst_next(src, *src),
			  dest = ppc_inst_next(dest, *dest))

As noticed by Christophe and Jordan, if end is the exact end of a
page, and the next page is not mapped, this will fault, because *dest
will read 8 bytes, 4 bytes into the next page.

So value is passed by reference, so the helper can be careful to use
ppc_inst_read() on it.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Reviewed-by: Jordan Niethe &lt;jniethe5@gmail.com&gt;
Link: https://lore.kernel.org/r/20200522133318.1681406-1-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>powerpc: Introduce a function for reporting instruction length</title>
<updated>2020-05-18T14:10:38Z</updated>
<author>
<name>Jordan Niethe</name>
</author>
<published>2020-05-06T03:40:37Z</published>
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<id>urn:sha1:622cf6f436a12338bbcfbb3474629755547fd112</id>
<content type='text'>
Currently all instructions have the same length, but in preparation for
prefixed instructions introduce a function for returning instruction
length.

Signed-off-by: Jordan Niethe &lt;jniethe5@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Reviewed-by: Alistair Popple &lt;alistair@popple.id.au&gt;
Link: https://lore.kernel.org/r/20200506034050.24806-18-jniethe5@gmail.com
</content>
</entry>
<entry>
<title>powerpc: Use a function for reading instructions</title>
<updated>2020-05-18T14:10:37Z</updated>
<author>
<name>Jordan Niethe</name>
</author>
<published>2020-05-06T03:40:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f8faaffaa7d99028e457ef2d1dcb43a98f736938'/>
<id>urn:sha1:f8faaffaa7d99028e457ef2d1dcb43a98f736938</id>
<content type='text'>
Prefixed instructions will mean there are instructions of different
length. As a result dereferencing a pointer to an instruction will not
necessarily give the desired result. Introduce a function for reading
instructions from memory into the instruction data type.

Signed-off-by: Jordan Niethe &lt;jniethe5@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Reviewed-by: Alistair Popple &lt;alistair@popple.id.au&gt;
Link: https://lore.kernel.org/r/20200506034050.24806-13-jniethe5@gmail.com
</content>
</entry>
<entry>
<title>powerpc: Use a macro for creating instructions from u32s</title>
<updated>2020-05-18T14:10:36Z</updated>
<author>
<name>Jordan Niethe</name>
</author>
<published>2020-05-06T03:40:26Z</published>
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<id>urn:sha1:753462512868674a788ecc77bb96752efb818785</id>
<content type='text'>
In preparation for instructions having a more complex data type start
using a macro, ppc_inst(), for making an instruction out of a u32.  A
macro is used so that instructions can be used as initializer elements.
Currently this does nothing, but it will allow for creating a data type
that can represent prefixed instructions.

Signed-off-by: Jordan Niethe &lt;jniethe5@gmail.com&gt;
[mpe: Change include guard to _ASM_POWERPC_INST_H]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Reviewed-by: Alistair Popple &lt;alistair@popple.id.au&gt;
Link: https://lore.kernel.org/r/20200506034050.24806-7-jniethe5@gmail.com
</content>
</entry>
</feed>
