<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/powerpc/kernel/head_64.S, branch linux-2.6.21.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.21.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.21.y'/>
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<updated>2007-02-07T03:03:23Z</updated>
<entry>
<title>[POWERPC] Fix performance monitor exception</title>
<updated>2007-02-07T03:03:23Z</updated>
<author>
<name>Livio Soares</name>
</author>
<published>2007-02-07T01:51:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=449d846dbcbf61bdf7d50a923e4791102168c292'/>
<id>urn:sha1:449d846dbcbf61bdf7d50a923e4791102168c292</id>
<content type='text'>
To the issue: some point during 2.6.20 development, Paul Mackerras
introduced the "lazy IRQ  disabling" patch (very cool work,  BTW).
In that patch, the performance monitor unit exception was marked as
"maskable", in the sense that if interrupts were soft-disabled, that
exception could be ignored.  This broke my PowerPC profiling code.
The symptom that I see is that a varying number of interrupts
(from 0 to $n$, typically closer to 0) get delivered, when, in
reality, it should always be very close to $n$.

The issue stems from the way masking is being done.   Masking in
this fashion seems to  work well with the decrementer and external
interrupts, because they are raised again until "really"  handled.
For the PMU, however, this does not apply (at least on my Xserver
machine with a 970FX processor).  If the PMU exception is not handled,
it will _not_ be re-raised (at least on my machine).  The documentation
states that the PMXE bit in MMCR0 is set to 0 when the PMU exception
is raised.  However, software must re-set the bit to re-enable PMU
exceptions.  If the exception is ignored (as currently) not only is
that interrupt lost, but because software does not re-set PMXE, the
PMU registers are "frozen" forever.

[This patch means that performance monitor exceptions are taken and
handled even if irqs are off, as long as some other interrupt hasn't
come along and caused interrupts to be hard-disabled.  In this sense
the PMU exception becomes like an NMI.  The oprofile code for most
powerpc processors does nothing that is unsafe in an NMI context, but
the Cell oprofile code does a spin_lock_irqsave.  However, that turns
out to be OK because Cell doesn't actually use the performance
monitor exception; performance monitor interrupts come in as a
regular interrupt on Cell, so will be disabled when irqs are off.
 -- paulus.]

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] iSeries: Eliminate "exceeds stub group size" warnings</title>
<updated>2006-12-04T09:41:31Z</updated>
<author>
<name>Stephen Rothwell</name>
</author>
<published>2006-11-27T03:59:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c705677e1c69012adea3bc51b54e9c7170d1cbee'/>
<id>urn:sha1:c705677e1c69012adea3bc51b54e9c7170d1cbee</id>
<content type='text'>
Commit 3ccfc65c5004e5fe5cfbffe43b8acc686680b53e missed the same fixes for
legacy iSeries specific code, so make some more symbols no longer global.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'linux-2.6' into for-linus</title>
<updated>2006-12-04T04:59:07Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-12-04T04:59:07Z</published>
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<id>urn:sha1:79acbb3ff2d8095b692e1502b9eb2ccec348de26</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[PATCH] Remove occurences of PPC_MULTIPLATFORM in head_64.S</title>
<updated>2006-11-13T03:44:58Z</updated>
<author>
<name>s.hauer@pengutronix.de</name>
</author>
<published>2006-11-02T12:56:04Z</published>
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<id>urn:sha1:a7a1ed305043961ed06e0ee5e7a4a2cc1250f4b5</id>
<content type='text'>
Since iSeries is merged to MULTIPLATFORM, there is no way to build a 64bit
kernel without MULTIPLATFORM, so PPC_MULTIPLATFORM can be removed in
64bit-only files.

Signed-off-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Eliminate "exceeds stub group size" linker warning</title>
<updated>2006-11-01T22:56:59Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-11-01T22:44:37Z</published>
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<id>urn:sha1:3ccfc65c5004e5fe5cfbffe43b8acc686680b53e</id>
<content type='text'>
It turns out that the linker warnings on 64-bit powerpc about "section
blah exceeds stub group size" were being triggered by conditional
branches in head_64.S branching to global symbols, whether in
head_64.S or in other files.  This eliminates the warnings by making
some global symbols in head_64.S no longer global, and by rearranging
some branches.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
[ Yee-haa. Maybe I'll notice newly introduced real warnings now - Linus ]
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Make sure __cpu_preinit_ppc970 gets called on 970GX processors</title>
<updated>2006-10-25T23:20:07Z</updated>
<author>
<name>Olof Johansson</name>
</author>
<published>2006-10-25T22:32:40Z</published>
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<id>urn:sha1:190a24f5605d95b786c92280bf7a51ebef43f29f</id>
<content type='text'>
Add check for 970GX for __cpu_preinit_ppc970.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Consolidate feature fixup code</title>
<updated>2006-10-25T01:42:10Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2006-10-24T06:42:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc'/>
<id>urn:sha1:42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc</id>
<content type='text'>
There are currently two versions of the functions for applying the
feature fixups, one for CPU features and one for firmware features. In
addition, they are both in assembly and with separate implementations
for 32 and 64 bits. identify_cpu() is also implemented in assembly and
separately for 32 and 64 bits.

This patch replaces them with a pair of C functions. The call sites are
slightly moved on ppc64 as well to be called from C instead of from
assembly, though it's a very small change, and thus shouldn't cause any
problem.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Make sure interrupt enable gets restored properly</title>
<updated>2006-10-18T00:12:53Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-10-18T00:11:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b0a779debd56514b2b5de7617a1643e5dac2d4dd'/>
<id>urn:sha1:b0a779debd56514b2b5de7617a1643e5dac2d4dd</id>
<content type='text'>
The lazy IRQ disable patch missed a couple of places where the
interrupt enable flags need to be restored correctly.  First, we
weren't restoring the paca-&gt;hard_enabled flag on interrupt exit.
Instead of saving it on entry, we compute it from the MSR_EE bit
in the MSR we are restoring at exit.  Secondly, the MMU hash miss
code was clearing both paca-&gt;soft_enabled and paca-&gt;hard_enabled
but not restoring them in the case where hash_page was able to
resolve the miss from the Linux page tables.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Lazy interrupt disabling for 64-bit machines</title>
<updated>2006-10-16T06:31:36Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-10-04T06:47:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d04c56f73c30a5e593202ecfcf25ed43d42363a2'/>
<id>urn:sha1:d04c56f73c30a5e593202ecfcf25ed43d42363a2</id>
<content type='text'>
This implements a lazy strategy for disabling interrupts.  This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca.  If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns.  This means that interrupts only
actually get disabled in the processor when an interrupt comes along.

When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled.  If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.

This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.

This version renames paca-&gt;proc_enabled to paca-&gt;soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw.  This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags.  This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] implement BEGIN/END_FW_FTR_SECTION</title>
<updated>2006-10-03T06:50:21Z</updated>
<author>
<name>Stephen Rothwell</name>
</author>
<published>2006-09-25T08:19:00Z</published>
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<id>urn:sha1:3f639ee8c52c187d8c95db430ac6f485bffbe5af</id>
<content type='text'>
and use it an all the obvious places in assembler code.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
</content>
</entry>
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