<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/powerpc/kernel/head_64.S, branch linux-2.6.18.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.18.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.18.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2006-07-28T18:07:08Z</updated>
<entry>
<title>[POWERPC] force 64bit mode in fwnmi handlers to workaround firmware bugs</title>
<updated>2006-07-28T18:07:08Z</updated>
<author>
<name>Olaf Hering</name>
</author>
<published>2006-07-19T08:34:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9fc0a92c7ebcad96467d62077497ce195d9b741c'/>
<id>urn:sha1:9fc0a92c7ebcad96467d62077497ce195d9b741c</id>
<content type='text'>
The firmware of POWER4 and JS20 systems does not switch the cpu to 64bit
mode when the registered system_reset and machine_check handlers get called.
If a 32bit process runs on that cpu at the time of the event, the cpu
remains in 32bit mode. xmon and kdump can not deal with it, the result is
an error like 'Bad kernel stack pointer fff2aad0 at 3200'.
xmon just loses some register info, but booting the kdump kernel usually fails.

Both handlers are not hot paths.  Duplicate the EXCEPTION_PROLOG_PSERIES macro
and add two instructions to switch to 64bit:

 li     r11,5;
 rldimi r10,r11,61,0;

Signed-off-by: Olaf Hering &lt;olh@suse.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>Remove obsolete #include &lt;linux/config.h&gt;</title>
<updated>2006-06-30T17:25:36Z</updated>
<author>
<name>Jörn Engel</name>
</author>
<published>2006-06-30T17:25:36Z</published>
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<id>urn:sha1:6ab3d5624e172c553004ecc862bfeac16d9d68b7</id>
<content type='text'>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Make sure smp_processor_id works very early in boot</title>
<updated>2006-06-29T06:22:47Z</updated>
<author>
<name>Michael Ellerman</name>
</author>
<published>2006-06-28T03:18:53Z</published>
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<id>urn:sha1:33dbcf72f607f5da791402e161feaf1ccf5d5be4</id>
<content type='text'>
There's a small period early in boot where we don't know which cpu we're
running on. That's ok, except that it means we have no paca, or more
correctly that our paca pointer points somewhere random.

So that we can safely call things like smp_processor_id(), we need a paca,
so just assume we're on cpu 0. No code should _write_ to the paca before
we've set the correct one up.

We setup the proper paca after we've scanned the flat device tree in
early_setup(), so there's no need to do it again in start_here_common.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Skip the "copy down" of the kernel if it is already at zero.</title>
<updated>2006-06-28T05:18:53Z</updated>
<author>
<name>Jimi Xenidis</name>
</author>
<published>2006-06-26T08:56:58Z</published>
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<id>urn:sha1:d0b79c54fc14f1f2db64180a21b84146028c598b</id>
<content type='text'>
This patch allows the kernel to recognized that it was loaded at zero
and the copy down of the image is unnecessary.  This is useful for
Simulators and kexec models.
On a typical 3.8 MiB vmlinux.strip this saves about 2.3 million instructions.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Setup the boot cpu's paca pointer in C rather than asm</title>
<updated>2006-06-28T01:59:47Z</updated>
<author>
<name>Michael Ellerman</name>
</author>
<published>2006-06-23T08:20:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4ba99b97dadd35b9ce1438b2bc7c992a4a14a8b1'/>
<id>urn:sha1:4ba99b97dadd35b9ce1438b2bc7c992a4a14a8b1</id>
<content type='text'>
There's no need to set the boot cpu paca in asm, so do it in C so us
mere mortals can understand it.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Remove remaining iSeries debugger cruft</title>
<updated>2006-06-28T01:59:46Z</updated>
<author>
<name>Michael Ellerman</name>
</author>
<published>2006-06-23T08:15:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1dce0e30471ac863fd141d137c98e3644817975e'/>
<id>urn:sha1:1dce0e30471ac863fd141d137c98e3644817975e</id>
<content type='text'>
None of this seems to be necessary, so let's see if can remove it and not
break anything. Booted on iSeries &amp; pSeries here.

NB. we don't remove the hvReleaseData, we just move it down so that the file
reads more clearly.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] cell: add RAS support</title>
<updated>2006-06-21T05:01:29Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2006-06-19T18:33:16Z</published>
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<id>urn:sha1:acf7d76827a577059636e949079021e6af6dd702</id>
<content type='text'>
This is a first version of support for the Cell BE "Reliability,
Availability and Serviceability" features.

It doesn't yet handle some of the RAS interrupts (the ones described in
iic_is/iic_irr), I'm still working on a proper way to expose these. They
are essentially a cascaded controller by themselves (sic !) though I may
just handle them locally to the iic driver. I need also to sync with
David Erb on the way he hooked in the performance monitor interrupt.

So that's all for 2.6.17 and I'll do more work on that with my rework of
the powerpc interrupt layer that I'm hacking on at the moment.

Signed-off-by: Arnd Bergmann &lt;arnd.bergmann@de.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Use correct sequence for putting CPU into nap mode</title>
<updated>2006-04-18T11:49:11Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-04-18T11:49:11Z</published>
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<id>urn:sha1:f39224a8c1828bdd327539da72a53d8a13595838</id>
<content type='text'>
We weren't using the recommended sequence for putting the CPU into
nap mode.  When I changed the idle loop, for some reason 7447A cpus
started hanging when we put them into nap mode.  Changing to the
recommended sequence fixes that.

The complexity here is that the recommended sequence is a loop that
keeps putting the cpu back into nap mode.  Clearly we need some way
to break out of the loop when an interrupt (external interrupt,
decrementer, performance monitor) occurs.  Here we use a bit in
the thread_info struct to indicate that we need this, and the exception
entry code notices this and arranges for the exception to return
to the value in the link register, thus breaking out of the loop.
We use a new `local_flags' field in the thread_info which we can
alter without needing to use an atomic update sequence.

The PPC970 has the same recommended sequence, so we do the same thing
there too.

This also fixes a bug in the kernel stack overflow handling code on
32-bit, since it was causing a value that we needed in a register to
get trashed.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Allow non zero boot cpuids</title>
<updated>2006-03-27T03:48:48Z</updated>
<author>
<name>Anton Blanchard</name>
</author>
<published>2006-03-25T06:25:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4df20460a3ff0d60280738b094945c56cb5567a5'/>
<id>urn:sha1:4df20460a3ff0d60280738b094945c56cb5567a5</id>
<content type='text'>
We currently have a hack to flip the boot cpu and its secondary thread
to logical cpuid 0 and 1. This means the logical - physical mapping will
differ depending on which cpu is boot cpu. This is most apparent on
kexec, where we might kexec on any cpu and therefore change the mapping
from boot to boot.

The patch below does a first pass early on to work out the logical cpuid
of the boot thread. We then fix up some paca structures to match.

Ive also removed the boot_cpuid_phys variable for ppc64, to be
consistent we use get_hard_smp_processor_id(boot_cpuid) everywhere.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] correct the comment about stackpointer alignment in __boot_from_prom</title>
<updated>2006-03-27T03:48:32Z</updated>
<author>
<name>Olaf Hering</name>
</author>
<published>2006-03-23T20:50:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6088857b169c64e6e9672a2a66e76db3e957d5db'/>
<id>urn:sha1:6088857b169c64e6e9672a2a66e76db3e957d5db</id>
<content type='text'>
The address of variable val in prom_init_stdout is passed to prom_getprop.
prom_getprop casts the pointer to u32 and passes it to call_prom in the hope
that OpenFirmware stores something there.
But the pointer is truncated in the lower bits and the expected value is
stored somewhere else.

In my testing I had a stackpointer of 0x0023e6b4. val was at offset 120,
wich has address 0x0023e72c. But the value passed to OF was 0x0023e728.

c00000000040b710:       3b 01 00 78     addi    r24,r1,120
...
c00000000040b754:       57 08 00 38     rlwinm  r8,r24,0,0,28
...
c00000000040b784:       80 01 00 78     lwz     r0,120(r1)
...
c00000000040b798:       90 1b 00 0c     stw     r0,12(r27)
...

The stackpointer came from 32bit code.
The chain was yaboot -&gt; zImage -&gt; vmlinux

PowerMac OpenFirmware does appearently not handle the ELF sections
correctly.  If yaboot was compiled in
/usr/src/packages/BUILD/lilo-10.1.1/yaboot, then the stackpointer is
unaligned. But the stackpointer is correct if yaboot is compiled in
/tmp/yaboot.

This bug triggered since 2.6.15, now prom_getprop is an inline
function. gcc clears the lower bits, instead of just clearing the
upper 32 bits.

Signed-off-by: Olaf Hering &lt;olh@suse.de&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
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