<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/powerpc/kernel/fpu.S, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2008-07-01T01:28:50Z</updated>
<entry>
<title>powerpc: Add VSX context save/restore, ptrace and signal support</title>
<updated>2008-07-01T01:28:50Z</updated>
<author>
<name>Michael Neuling</name>
</author>
<published>2008-06-25T04:07:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ce48b2100785e5ca629fb3aa8e3b50aca808f692'/>
<id>urn:sha1:ce48b2100785e5ca629fb3aa8e3b50aca808f692</id>
<content type='text'>
This patch extends the floating point save and restore code to use the
VSX load/stores when VSX is available.  This will make FP context
save/restore marginally slower on FP only code, when VSX is available,
as it has to load/store 128bits rather than just 64bits.

Mixing FP, VMX and VSX code will get constant architected state.

The signals interface is extended to enable access to VSR 0-31
doubleword 1 after discussions with tool chain maintainers.  Backward
compatibility is maintained.

The ptrace interface is also extended to allow access to VSR 0-31 full
registers.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Add VSX assembler code macros</title>
<updated>2008-07-01T01:28:48Z</updated>
<author>
<name>Michael Neuling</name>
</author>
<published>2008-06-25T04:07:18Z</published>
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<id>urn:sha1:72ffff5b1792b0fa4d40a8e2f3276fff999820ec</id>
<content type='text'>
This adds the macros for the VSX load/store instruction as most
binutils are not going to support this for a while.

Also add VSX register save/restore macros and vsr[0-63] register definitions.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Make load_up_fpu and load_up_altivec callable</title>
<updated>2008-07-01T01:28:45Z</updated>
<author>
<name>Michael Neuling</name>
</author>
<published>2008-06-25T04:07:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6f3d8e6947ec98e358514fc0f7b2e37fe88a21bb'/>
<id>urn:sha1:6f3d8e6947ec98e358514fc0f7b2e37fe88a21bb</id>
<content type='text'>
Make load_up_fpu and load_up_altivec callable so they can be reused by
the VSX code.

Signed-off-by: Michael Neuling &lt;mikey@neuling.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Restore copyright notice in arch/powerpc/kernel/fpu.S</title>
<updated>2006-08-30T04:45:35Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-08-30T04:45:35Z</published>
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<id>urn:sha1:fea23bfefb4e98efd3c36f00ccc0b60281dc99da</id>
<content type='text'>
This code got moved from head.S but the copyright notice on head.S didn't
get transferred with it.  Noticed by Cort Dougan &lt;cort@fsmlabs.com&gt;.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;</content>
</entry>
<entry>
<title>Remove obsolete #include &lt;linux/config.h&gt;</title>
<updated>2006-06-30T17:25:36Z</updated>
<author>
<name>Jörn Engel</name>
</author>
<published>2006-06-30T17:25:36Z</published>
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<id>urn:sha1:6ab3d5624e172c553004ecc862bfeac16d9d68b7</id>
<content type='text'>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
</entry>
<entry>
<title>[POWERPC] 64bit FPSCR support</title>
<updated>2006-06-15T09:31:25Z</updated>
<author>
<name>Anton Blanchard</name>
</author>
<published>2006-06-10T10:18:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1'/>
<id>urn:sha1:3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1</id>
<content type='text'>
Forthcoming machines will extend the FPSCR to 64 bits.  We already
had a 64-bit save area for the FPSCR, but we need to use a new form
of the mtfsf instruction.  Fortunately this new form is decoded as
an ordinary mtfsf by existing 64-bit processors.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc/64: Fix bug in setting floating-point exception mode</title>
<updated>2006-02-07T02:55:30Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2006-02-07T02:55:30Z</published>
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<id>urn:sha1:e2f5a3c1bec1cf3e7c76c080fd7f21476f05008a</id>
<content type='text'>
When loading up the FPU, we were using a 'ld' (load doubleword)
instruction to get the FP exception mode from the thread_struct,
but it's only an int field.  This changes the ld to lwz (load
word and zero-extend).

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Cleanup LOADADDR etc. asm macros</title>
<updated>2006-01-13T10:16:23Z</updated>
<author>
<name>David Gibson</name>
</author>
<published>2006-01-13T03:56:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e58c3495e6007af59382540bb21ee941e470d88d'/>
<id>urn:sha1:e58c3495e6007af59382540bb21ee941e470d88d</id>
<content type='text'>
This patch consolidates the variety of macros used for loading 32 or
64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*).  The
idea is to make the set of macros consistent across 32 and 64 bit and
to make it more obvious which is the appropriate one to use in a given
situation.  The new macros and their semantics are described in the
comments in ppc_asm.h.

In the process, we change several places that were unnecessarily using
immediate loads on ppc64 to use the GOT/TOC.  Likewise we cleanup a
couple of places where we were clumsily subtracting PAGE_OFFSET with
asm instructions to use assemble-time arithmetic or the toreal() macro
instead.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Consolidate asm compatibility macros</title>
<updated>2005-11-10T02:10:38Z</updated>
<author>
<name>David Gibson</name>
</author>
<published>2005-11-10T01:56:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3ddfbcf19b15ccd25a0b4b2dc2e38000e08de739'/>
<id>urn:sha1:3ddfbcf19b15ccd25a0b4b2dc2e38000e08de739</id>
<content type='text'>
This patch consolidates macros used to generate assembly for
compatibility across different CPUs or configs.  A new header,
asm-powerpc/asm-compat.h contains the main compatibility macros.  It
uses some preprocessor magic to make the macros suitable both for use
in .S files, and in inline asm in .c files.  Headers (bitops.h,
uaccess.h, atomic.h, bug.h) which had their own such compatibility
macros are changed to use asm-compat.h.

ppc_asm.h is now for use in .S files *only*, and a #error enforces
that.  As such, we're a lot more careless about namespace pollution
here than in asm-compat.h.

While we're at it, this patch adds a call to the PPC405_ERR77 macro in
futex.h which should have had it already, but didn't.

Built and booted on pSeries, Maple and iSeries (ARCH=powerpc).  Built
for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc).

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>powerpc: Introduce toreal/fromreal assembly macros</title>
<updated>2005-10-27T12:44:39Z</updated>
<author>
<name>Paul Mackerras</name>
</author>
<published>2005-10-27T12:44:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6316222ea050d469c3155881d9dee2c7671d9fef'/>
<id>urn:sha1:6316222ea050d469c3155881d9dee2c7671d9fef</id>
<content type='text'>
On 32-bit platforms, these convert from kernel virtual addresses
to real (physical addresses), like tophys/tovirt but they use
the same register for the source and destination.  On 64-bit
platforms, they do nothing because the hardware ignores the top
two bits of the address in real mode.

These new macros are used in fpu.S now.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
</feed>
