<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/powerpc/kernel/exceptions-64e.S, branch linux-6.1.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.1.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.1.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2022-10-18T11:46:19Z</updated>
<entry>
<title>powerpc/64/interrupt: Prevent NMI PMI causing a dangerous warning</title>
<updated>2022-10-18T11:46:19Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2022-10-14T03:07:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a073672eb09670540e95a2a4aa1c46f5da74159f'/>
<id>urn:sha1:a073672eb09670540e95a2a4aa1c46f5da74159f</id>
<content type='text'>
NMI PMIs really should not return using the normal interrupt_return
function. If such a PMI hits in code returning to user with the context
switched to user mode, this warning can fire. This was enough to cause
crashes when reproducing on 64s, because another perf interrupt would
hit while reporting bug, and that would cause another bug, and so on
until smashing the stack.

Work around that particular crash for now by just disabling that context
warning for PMIs. This is a hack and not a complete fix, there could be
other such problems lurking in corners. But it does fix the known crash.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20221014030729.2077151-3-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc/64e: provide an addressing macro for use with TOC in alternate register</title>
<updated>2022-09-28T09:22:12Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2022-09-26T03:40:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3569d84bb26f6f07d426446da3d2c836180f1565'/>
<id>urn:sha1:3569d84bb26f6f07d426446da3d2c836180f1565</id>
<content type='text'>
The interrupt entry code carefully saves a minimal number of registers,
so in some places the TOC is required, it is loaded into a different
register, so provide a macro that can supply an alternate TOC register.

This continues to use got addressing because TOC-relative results in
"got/toc optimization is not supported" messages by the linker. Having
r2 be one of the saved registers and using that for TOC addressing may
be the best way to avoid that and switch this to TOC addressing.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220926034057.2360083-6-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc/64: provide a helper macro to load r2 with the kernel TOC</title>
<updated>2022-09-28T09:22:12Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2022-09-26T03:40:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8e93fb33c84f68db20c0bc2821334a4c54c3e251'/>
<id>urn:sha1:8e93fb33c84f68db20c0bc2821334a4c54c3e251</id>
<content type='text'>
A later change stops the kernel using r2 and loads it with a poison
value.  Provide a PACATOC loading abstraction which can hide this
detail.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220926034057.2360083-5-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc/64: use 32-bit immediate for STACK_FRAME_REGS_MARKER</title>
<updated>2022-09-28T09:22:12Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2022-09-26T03:40:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=17773afdcd1589c5925a984f512330410cb2ba4f'/>
<id>urn:sha1:17773afdcd1589c5925a984f512330410cb2ba4f</id>
<content type='text'>
Using a 32-bit constant for this marker allows it to be loaded with
two ALU instructions, like 32-bit. This avoids a TOC entry and a
TOC load that depends on the r2 value that has just been loaded from
the PACA.

This changes the value for 32-bit as well, so both have the same
value in the low 4 bytes and 64-bit has 0 in the top bytes.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220926034057.2360083-2-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc/64e: Clarify register saves and clears with {SAVE,ZEROIZE}_GPRS</title>
<updated>2022-09-26T13:00:15Z</updated>
<author>
<name>Rohan McLure</name>
</author>
<published>2022-09-21T06:55:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=53ecaa6778d613807e590c320ccfcf48a4114108'/>
<id>urn:sha1:53ecaa6778d613807e590c320ccfcf48a4114108</id>
<content type='text'>
The common interrupt handler prologue macro and the bad_stack
trampolines include consecutive sequences of register saves, and some
register clears. Neaten such instances by expanding use of the SAVE_GPRS
macro and employing the ZEROIZE_GPR macro when appropriate.

Also simplify an invocation of SAVE_GPRS targetting all non-volatile
registers to SAVE_NVGPRS.

Signed-off-by: Rohan McLure &lt;rmclure@linux.ibm.com&gt;
Reported-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20220921065605.1051927-7-rmclure@linux.ibm.com

</content>
</entry>
<entry>
<title>powerpc/64e: Remove unnecessary #ifdef CONFIG_PPC_FSL_BOOK3E</title>
<updated>2022-09-26T11:00:41Z</updated>
<author>
<name>Christophe Leroy</name>
</author>
<published>2022-09-19T17:01:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b6100bedf1f9aea264757ac4a56eb1d8b04b9356'/>
<id>urn:sha1:b6100bedf1f9aea264757ac4a56eb1d8b04b9356</id>
<content type='text'>
CONFIG_PPC_BOOK3E_64 implies CONFIG_PPC_FSL_BOOK3E so no need of
additional #ifdefs in files built exclusively for CONFIG_PPC_BOOK3E_64.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/df16255c13b63b0221c9be63b94a6864bed22c12.1663606875.git.christophe.leroy@csgroup.eu

</content>
</entry>
<entry>
<title>powerpc: flexible GPR range save/restore macros</title>
<updated>2021-11-29T12:15:20Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-10-22T06:13:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=aebd1fb45c622e9a2b06fb70665d084d3a8d6c78'/>
<id>urn:sha1:aebd1fb45c622e9a2b06fb70665d084d3a8d6c78</id>
<content type='text'>
Introduce macros that operate on a (start, end) range of GPRs, which
reduces lines of code and need to do mental arithmetic while reading the
code.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Reviewed-by: Segher Boessenkool &lt;segher@kernel.crashing.org&gt;
Reviewed-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20211022061322.2671178-1-npiggin@gmail.com

</content>
</entry>
<entry>
<title>powerpc/64e: Get dear offset with _DEAR macro</title>
<updated>2021-08-26T11:21:07Z</updated>
<author>
<name>Xiongwei Song</name>
</author>
<published>2021-08-07T01:02:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9db6e420268b2d561731468a31f0b15e2e9a145'/>
<id>urn:sha1:d9db6e420268b2d561731468a31f0b15e2e9a145</id>
<content type='text'>
Use _DEAR to get the offset of dear register in pr_regs for 64e cpus.

Signed-off-by: Xiongwei Song &lt;sxwjean@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210807010239.416055-5-sxwjean@me.com

</content>
</entry>
<entry>
<title>powerpc/64e: Get esr offset with _ESR macro</title>
<updated>2021-08-26T11:21:07Z</updated>
<author>
<name>Xiongwei Song</name>
</author>
<published>2021-08-07T01:02:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cfa47772ca8d53d7a6c9b331a7f6e7c4c9827214'/>
<id>urn:sha1:cfa47772ca8d53d7a6c9b331a7f6e7c4c9827214</id>
<content type='text'>
Use _ESR to get the offset of esr register in pr_regs for 64e cpus.

Signed-off-by: Xiongwei Song &lt;sxwjean@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210807010239.416055-3-sxwjean@me.com

</content>
</entry>
<entry>
<title>powerpc/booke: Avoid link stack corruption in several places</title>
<updated>2021-08-25T03:35:47Z</updated>
<author>
<name>Christophe Leroy</name>
</author>
<published>2021-08-24T07:56:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f5007dbf4da729baa850b33a64dc3cc53757bdf8'/>
<id>urn:sha1:f5007dbf4da729baa850b33a64dc3cc53757bdf8</id>
<content type='text'>
Use bcl 20,31,+4 instead of bl in order to preserve link stack.

See commit c974809a26a1 ("powerpc/vdso: Avoid link stack corruption
in __get_datapage()") for details.

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/e9fbc285eceb720e6c0e032ef47fe8b05f669b48.1629791751.git.christophe.leroy@csgroup.eu

</content>
</entry>
</feed>
