<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/powerpc/kernel/entry_64.S, branch linux-5.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.13.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-04-14T13:04:43Z</updated>
<entry>
<title>powerpc/64e/interrupt: reconcile irq soft-mask state in C</title>
<updated>2021-04-14T13:04:43Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-03-16T10:42:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=097157e16cf8bf91b9cf6fbda05d234d3599c01f'/>
<id>urn:sha1:097157e16cf8bf91b9cf6fbda05d234d3599c01f</id>
<content type='text'>
Use existing 64s interrupt entry wrapper code to reconcile irqs in C.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210316104206.407354-7-npiggin@gmail.com
</content>
</entry>
<entry>
<title>powerpc/interrupt: update common interrupt code for</title>
<updated>2021-04-14T13:04:20Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-03-16T10:41:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dc6231821a148d0392292924fdae5b34679af6b2'/>
<id>urn:sha1:dc6231821a148d0392292924fdae5b34679af6b2</id>
<content type='text'>
This makes adjustments to 64-bit asm and common C interrupt return
code to be usable by the 64e subarchitecture.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210316104206.407354-4-npiggin@gmail.com
</content>
</entry>
<entry>
<title>powerpc/64e/interrupt: always save nvgprs on interrupt</title>
<updated>2021-04-14T13:04:19Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-03-16T10:41:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4228b2c3d20e9f80b847f809c38e6cf82864fa50'/>
<id>urn:sha1:4228b2c3d20e9f80b847f809c38e6cf82864fa50</id>
<content type='text'>
In order to use the C interrupt return, nvgprs must always be saved.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210316104206.407354-3-npiggin@gmail.com
</content>
</entry>
<entry>
<title>Merge tag 'powerpc-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux</title>
<updated>2021-02-22T22:34:00Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2021-02-22T22:34:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b12b47249688915e987a9a2a393b522f86f6b7ab'/>
<id>urn:sha1:b12b47249688915e987a9a2a393b522f86f6b7ab</id>
<content type='text'>
Pull powerpc updates from Michael Ellerman:

 - A large series adding wrappers for our interrupt handlers, so that
   irq/nmi/user tracking can be isolated in the wrappers rather than
   spread in each handler.

 - Conversion of the 32-bit syscall handling into C.

 - A series from Nick to streamline our TLB flushing when using the
   Radix MMU.

 - Switch to using queued spinlocks by default for 64-bit server CPUs.

 - A rework of our PCI probing so that it happens later in boot, when
   more generic infrastructure is available.

 - Two small fixes to allow 32-bit little-endian processes to run on
   64-bit kernels.

 - Other smaller features, fixes &amp; cleanups.

Thanks to: Alexey Kardashevskiy, Ananth N Mavinakayanahalli, Aneesh
Kumar K.V, Athira Rajeev, Bhaskar Chowdhury, Cédric Le Goater, Chengyang
Fan, Christophe Leroy, Christopher M. Riedl, Fabiano Rosas, Florian
Fainelli, Frederic Barrat, Ganesh Goudar, Hari Bathini, Jiapeng Chong,
Joseph J Allen, Kajol Jain, Markus Elfring, Michal Suchanek, Nathan
Lynch, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Pingfan Liu,
Po-Hsu Lin, Qian Cai, Ram Pai, Randy Dunlap, Sandipan Das, Stephen
Rothwell, Tyrel Datwyler, Will Springer, Yury Norov, and Zheng Yongjun.

* tag 'powerpc-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (188 commits)
  powerpc/perf: Adds support for programming of Thresholding in P10
  powerpc/pci: Remove unimplemented prototypes
  powerpc/uaccess: Merge raw_copy_to_user_allowed() into raw_copy_to_user()
  powerpc/uaccess: Merge __put_user_size_allowed() into __put_user_size()
  powerpc/uaccess: get rid of small constant size cases in raw_copy_{to,from}_user()
  powerpc/64: Fix stack trace not displaying final frame
  powerpc/time: Remove get_tbl()
  powerpc/time: Avoid using get_tbl()
  spi: mpc52xx: Avoid using get_tbl()
  powerpc/syscall: Avoid storing 'current' in another pointer
  powerpc/32: Handle bookE debugging in C in syscall entry/exit
  powerpc/syscall: Do not check unsupported scv vector on PPC32
  powerpc/32: Remove the counter in global_dbcr0
  powerpc/32: Remove verification of MSR_PR on syscall in the ASM entry
  powerpc/syscall: implement system call entry/exit logic in C for PPC32
  powerpc/32: Always save non volatile GPRs at syscall entry
  powerpc/syscall: Change condition to check MSR_RI
  powerpc/syscall: Save r3 in regs-&gt;orig_r3
  powerpc/syscall: Use is_compat_task()
  powerpc/syscall: Make interrupt.c buildable on PPC32
  ...
</content>
</entry>
<entry>
<title>powerpc/syscall: Save r3 in regs-&gt;orig_r3</title>
<updated>2021-02-11T12:35:10Z</updated>
<author>
<name>Christophe Leroy</name>
</author>
<published>2021-02-08T15:10:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8875f47b7681aa4e4484a9b612577b044725f839'/>
<id>urn:sha1:8875f47b7681aa4e4484a9b612577b044725f839</id>
<content type='text'>
Save r3 in regs-&gt;orig_r3 in system_call_exception()

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Reviewed-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/9a90805ab6b9101b46daf56470f457a57acd86fc.1612796617.git.christophe.leroy@csgroup.eu
</content>
</entry>
<entry>
<title>powerpc/64s: syscall real mode entry use mtmsrd rather than rfid</title>
<updated>2021-02-11T12:35:05Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-02-08T06:33:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=14ad0e7d04f46865775fb010ccd96fb1cc83433a'/>
<id>urn:sha1:14ad0e7d04f46865775fb010ccd96fb1cc83433a</id>
<content type='text'>
Have the real mode system call entry handler branch to the kernel
0xc000... address and then use mtmsrd to enable the MMU, rather than use
SRRs and rfid.

Commit 8729c26e675c ("powerpc/64s/exception: Move real to virt switch
into the common handler") implemented this style of real mode entry for
other interrupt handlers, so this brings system calls into line with
them, which is the main motivcation for the change.

This tends to be slightly faster due to avoiding the mtsprs, and it also
does not clobber the SRR registers, which becomes important in a
subsequent change. The real mode entry points don't tend to be too
important for performance these days, but it is possible for a
hypervisor to run guests in AIL=0 mode for certian reasons.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210208063326.331502-1-npiggin@gmail.com
</content>
</entry>
<entry>
<title>powerpc/64s: fix scv entry fallback flush vs interrupt</title>
<updated>2021-01-20T04:58:19Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2021-01-11T06:24:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=08685be7761d69914f08c3d6211c543a385a5b9c'/>
<id>urn:sha1:08685be7761d69914f08c3d6211c543a385a5b9c</id>
<content type='text'>
The L1D flush fallback functions are not recoverable vs interrupts,
yet the scv entry flush runs with MSR[EE]=1. This can result in a
timer (soft-NMI) or MCE or SRESET interrupt hitting here and overwriting
the EXRFI save area, which ends up corrupting userspace registers for
scv return.

Fix this by disabling RI and EE for the scv entry fallback flush.

Fixes: f79643787e0a0 ("powerpc/64s: flush L1D on kernel entry")
Cc: stable@vger.kernel.org # 5.9+ which also have flush L1D patch backport
Reported-by: Tulio Magno Quites Machado Filho &lt;tuliom@linux.ibm.com&gt;
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20210111062408.287092-1-npiggin@gmail.com
</content>
</entry>
<entry>
<title>powerpc/64s: Remove MSR[ISF] bit</title>
<updated>2020-12-09T12:48:14Z</updated>
<author>
<name>Nicholas Piggin</name>
</author>
<published>2020-11-06T04:53:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e89a8ca94bf583f2577fe722483f0304b3390aa2'/>
<id>urn:sha1:e89a8ca94bf583f2577fe722483f0304b3390aa2</id>
<content type='text'>
No supported processor implements this mode. Setting the bit in
MSR values can be a bit confusing (and would prevent the bit from
ever being reused). Remove it.

Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201106045340.1935841-1-npiggin@gmail.com
</content>
</entry>
<entry>
<title>powerpc/book3s64/pkeys: Optimize KUAP and KUEP feature disabled case</title>
<updated>2020-12-03T14:01:28Z</updated>
<author>
<name>Aneesh Kumar K.V</name>
</author>
<published>2020-11-27T04:44:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ec0f9b98f7d01b15c804e77e12a515ffc56d7309'/>
<id>urn:sha1:ec0f9b98f7d01b15c804e77e12a515ffc56d7309</id>
<content type='text'>
If FTR_BOOK3S_KUAP is disabled, kernel will continue to run with the same AMR
value with which it was entered. Hence there is a high chance that
we can return without restoring the AMR value. This also helps the case
when applications are not using the pkey feature. In this case, different
applications will have the same AMR values and hence we can avoid restoring
AMR in this case too.

Also avoid isync() if not really needed.

Do the same for IAMR.

null-syscall benchmark results:

With smap/smep disabled:
Without patch:
	957.95 ns    2778.17 cycles
With patch:
	858.38 ns    2489.30 cycles

With smap/smep enabled:
Without patch:
	1017.26 ns    2950.36 cycles
With patch:
	1021.51 ns    2962.44 cycles

Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201127044424.40686-23-aneesh.kumar@linux.ibm.com
</content>
</entry>
<entry>
<title>powerpc/book3s64/pkeys: Store/restore userspace AMR/IAMR correctly on entry and exit from kernel</title>
<updated>2020-12-03T14:01:25Z</updated>
<author>
<name>Aneesh Kumar K.V</name>
</author>
<published>2020-11-27T04:44:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8e560921b58cbc18e192f0ac273d307a37a144f9'/>
<id>urn:sha1:8e560921b58cbc18e192f0ac273d307a37a144f9</id>
<content type='text'>
This prepare kernel to operate with a different value than userspace AMR/IAMR.
For this, AMR/IAMR need to be saved and restored on entry and return from the
kernel.

With KUAP we modify kernel AMR when accessing user address from the kernel
via copy_to/from_user interfaces. We don't need to modify IAMR value in
similar fashion.

If MMU_FTR_PKEY is enabled we need to save AMR/IAMR in pt_regs on entering
kernel from userspace. If not we can assume that AMR/IAMR is not modified
from userspace.

We need to save AMR if we have MMU_FTR_BOOK3S_KUAP feature enabled and we are
interrupted within kernel. This is required so that if we get interrupted
within copy_to/from_user we continue with the right AMR value.

If we hae MMU_FTR_BOOK3S_KUEP enabled we need to restore IAMR on
return to userspace beause kernel will be running with a different
IAMR value.

Signed-off-by: Aneesh Kumar K.V &lt;aneesh.kumar@linux.ibm.com&gt;
Reviewed-by: Sandipan Das &lt;sandipan@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20201127044424.40686-11-aneesh.kumar@linux.ibm.com
</content>
</entry>
</feed>
