kernel.git/arch/powerpc/kernel/eeh_pe.c, branch linux-4.10.y

powerpc/pci: Always print PHB and PE numbers as hexadecimal

2016-11-22T00:57:07Z

PHB, PE (and by association MVE) numbers are printed as a mix of decimal and hexadecimal throughout the kernel. This can be misleading, so make them all hexadecimal. Standardising on hex instead of dec because: - PHB numbers are presented in hex in sysfs/debugfs (and lspci, etc) - PE numbers are presented as hex in sysfs and parsed in hex in debugfs The only place I think this could cause confusing are the messages during boot, i.e. pci 000a:01 : [PE# 000] Secondary bus 1 associated with PE#0 which can be a quick way to check PE numbers. pe_level_printk() will only print two characters instead of three, so the above would be pci 000a:01 : [PE# 00] Secondary bus 1 associated with PE#0 which gives a hint it's in hex. Signed-off-by: Russell Currey Signed-off-by: Michael Ellerman

powerpc/eeh: Export eeh_pe_state_mark()

2016-09-29T04:51:04Z

This exports eeh_pe_state_mark(). It will be used to mark the surprise hot removed PE as isolated to avoid unexpected EEH error reporting in surprise remove path. Signed-off-by: Gavin Shan Signed-off-by: Michael Ellerman

powerpc/eeh: fix misleading indentation

2016-04-26T23:19:37Z

Found by smatch. Signed-off-by: Andrew Donnellan Acked-by: Russell Currey Signed-off-by: Michael Ellerman

powerpc/eeh: Create PE for VFs

2016-03-08T22:58:19Z

This creates PEs for VFs in the weak function pcibios_bus_add_device(). Those PEs for VFs are identified with newly introduced flag EEH_PE_VF so that we treat them differently during EEH recovery. Signed-off-by: Wei Yang Acked-by: Gavin Shan Signed-off-by: Michael Ellerman

powerpc/eeh: Reworked eeh_pe_bus_get()

2016-03-08T22:57:46Z

The original implementation is ugly: unnecessary if statements and "out" tag. This reworks the function to avoid above weaknesses. No functional changes introduced. Signed-off-by: Gavin Shan Reviewed-by: Andrew Donnellan Signed-off-by: Michael Ellerman

powerpc/eeh: Fix stale cached primary bus

2016-02-15T10:10:04Z

When PE is created, its primary bus is cached to pe->bus. At later point, the cached primary bus is returned from eeh_pe_bus_get(). However, we could get stale cached primary bus and run into kernel crash in one case: full hotplug as part of fenced PHB error recovery releases all PCI busses under the PHB at unplugging time and recreate them at plugging time. pe->bus is still dereferencing the PCI bus that was released. This adds another PE flag (EEH_PE_PRI_BUS) to represent the validity of pe->bus. pe->bus is updated when its first child EEH device is online and the flag is set. Before unplugging in full hotplug for error recovery, the flag is cleared. Fixes: 8cdb2833 ("powerpc/eeh: Trace PCI bus from PE") Cc: stable@vger.kernel.org #v3.11+ Reported-by: Andrew Donnellan Reported-by: Pradipta Ghosh Signed-off-by: Gavin Shan Tested-by: Andrew Donnellan Signed-off-by: Michael Ellerman

powerpc/eeh: Fix PE location code

2016-01-27T00:37:37Z

In eeh_pe_loc_get(), the PE location code is retrieved from the "ibm,loc-code" property of the device node for the bridge of the PE's primary bus. It's not correct because the property indicates the parent PE's location code. This reads the correct PE location code from "ibm,io-base-loc-code" or "ibm,slot-location-code" property of PE parent bus's device node. Cc: stable@vger.kernel.org # v3.16+ Fixes: 357b2f3dd9b7 ("powerpc/eeh: Dump PE location code") Signed-off-by: Gavin Shan Tested-by: Russell Currey Signed-off-by: Michael Ellerman

powerpc/eeh: Disable automatically blocked PCI config

2015-08-18T09:34:42Z

pcibios_set_pcie_reset_state() could be called to complete reset request when passing through PCI device, flag EEH_PE_ISOLATED is set before saving the PCI config sapce. On some Broadcom adapters, EEH_PE_CFG_BLOCKED is automatically set when the flag EEH_PE_ISOLATED is marked. It caused bogus data saved from the PCI config space, which will be restored to the PCI adapter after the reset. Eventually, the hardware can't work with corrupted data in PCI config space. The patch fixes the issue with eeh_pe_state_mark_no_cfg(), which doesn't set EEH_PE_CFG_BLOCKED when seeing EEH_PE_ISOLATED on the PE, in order to avoid the bogus data saved and restored to the PCI config space. Reported-by: Rajanikanth H. Adaveeshaiah Signed-off-by: Gavin Shan Signed-off-by: Michael Ellerman

powerpc/eeh: Fix PE#0 check in eeh_add_to_parent_pe()

2015-03-31T02:10:39Z

The function eeh_add_parent_pe() is used to create a PE or add one edev to its parent PE. Current code checks if PE#0 is valid for the later case. Actually, we should validate PE#0 for both cases when EEH core regards PE#0 as invalid one (without flag EEH_VALID_PE_ZERO). Otherwise, not all EEH devices can be added to its parent PE#0 for EEH on P7IOC. The patch fixes the issue by validating PE#0 for the two cases. So far, we don't have PE#0 for EEH on P7IOC, but it will show up when we enable M64 for P7IOC. The patch also makes the error message more meaningful. Signed-off-by: Gavin Shan Signed-off-by: Benjamin Herrenschmidt

powerpc/eeh: Remove device_node dependency

2015-03-24T02:15:53Z

The patch removes struct eeh_dev::dn and the corresponding helper functions: eeh_dev_to_of_node() and of_node_to_eeh_dev(). Instead, eeh_dev_to_pdn() and pdn_to_eeh_dev() should be used to get the pdn, which might contain device_node on PowerNV platform. Signed-off-by: Gavin Shan Signed-off-by: Benjamin Herrenschmidt