<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/powerpc/include/asm/opal.h, branch linux-3.12.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.12.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.12.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2013-08-27T07:43:50Z</updated>
<entry>
<title>powerpc/powernv: Return secondary CPUs to firmware on kexec</title>
<updated>2013-08-27T07:43:50Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2013-08-21T03:03:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=13906db670a128864714c30c244b866dce119494'/>
<id>urn:sha1:13906db670a128864714c30c244b866dce119494</id>
<content type='text'>
With OPAL v3 we can return secondary CPUs to firmware on kexec. This
allows firmware to do various cleanups making things generally more
reliable, and will enable the "new" kernel to call OPAL to perform
some reconfiguration tasks early on that can only be done while
all the CPUs are in firmware.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Add PIO accessors for Power8 LPC bus</title>
<updated>2013-08-14T04:58:08Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2013-07-15T03:03:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3fafe9c202321a3edc47386d2071af89555c9f45'/>
<id>urn:sha1:3fafe9c202321a3edc47386d2071af89555c9f45</id>
<content type='text'>
This uses the hooks provided by CONFIG_PPC_INDIRECT_PIO to
implement a set of hooks for IO port access to use the LPC
bus via OPAL calls for the first 64K of IO space

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Update opal.h to add new LPC and XSCOM functions</title>
<updated>2013-08-14T04:57:56Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2013-07-15T03:03:09Z</published>
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<id>urn:sha1:cc0efb57ebf04e066a57aa975c8a38884e603123</id>
<content type='text'>
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powernv/opal: Notifier for OPAL events</title>
<updated>2013-06-21T06:01:50Z</updated>
<author>
<name>Gavin Shan</name>
</author>
<published>2013-06-20T10:13:22Z</published>
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<id>urn:sha1:1bc98de26d3f270e004421685a8e698e91cf95ca</id>
<content type='text'>
This patch implements a notifier to receive a notification on OPAL
event mask changes. The notifier is only called as a result of an OPAL
interrupt, which will happen upon reception of FSP messages or PCI errors.
Any event mask change detected as a result of opal_poll_events() will not
result in a notifier call.

[benh: changelog]
Signed-off-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/eeh: Sync OPAL API with firmware</title>
<updated>2013-06-20T07:06:17Z</updated>
<author>
<name>Gavin Shan</name>
</author>
<published>2013-06-20T05:21:05Z</published>
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<id>urn:sha1:23773230c823cf79415a436aa26009025008fef5</id>
<content type='text'>
The patch synchronizes OPAL APIs between kernel and firmware. Also,
we starts to replace opal_pci_get_phb_diag_data() with the similar
opal_pci_get_phb_diag_data2() and the former OPAL API would return
OPAL_UNSUPPORTED from now on.

Signed-off-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Detect OPAL v3 API version</title>
<updated>2013-05-14T05:10:02Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2013-05-14T05:10:02Z</published>
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<id>urn:sha1:75b93da43aa1132bf23dafbb4badb028ccf78129</id>
<content type='text'>
Future firmwares will support that new version

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Improve kexec reliability</title>
<updated>2013-05-10T06:59:18Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2013-05-10T06:59:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=73ed148aea9dc0508be7e30e7a447f55c1b2f378'/>
<id>urn:sha1:73ed148aea9dc0508be7e30e7a447f55c1b2f378</id>
<content type='text'>
We add a machine_shutdown hook that frees the OPAL interrupts
(so they get masked at the source and don't fire while kexec'ing)
and which triggers an IODA reset on all the PCIe host bridges
which will have the effect of blocking all DMAs and subsequent
PCIs interrupts.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Patch MSI EOI handler on P8</title>
<updated>2013-04-26T06:09:59Z</updated>
<author>
<name>Gavin Shan</name>
</author>
<published>2013-04-25T19:20:59Z</published>
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<id>urn:sha1:137436c9a6ee385c883db09e41af763888ee7642</id>
<content type='text'>
The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that. we have
individual IRQ chip in each PHB instance. During the MSI IRQ setup
time, the IRQ chip is copied over from the original one for that IRQ,
and the EOI handler is patched with the one that will handle the P/Q
bits (As Ben suggested).

Signed-off-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Update OPAL interfaces</title>
<updated>2011-12-07T07:02:02Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2011-11-29T18:22:50Z</published>
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<id>urn:sha1:f11fe5524aa7427ae8f23dbede8a29fc4f613a71</id>
<content type='text'>
This adds some more interfaces for OPAL v2

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>powerpc/powernv: Machine check and other system interrupts</title>
<updated>2011-09-20T06:10:03Z</updated>
<author>
<name>Benjamin Herrenschmidt</name>
</author>
<published>2011-09-19T17:45:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ed79ba9e15f84cef05aba5cbfe6e93f9b43c31f4'/>
<id>urn:sha1:ed79ba9e15f84cef05aba5cbfe6e93f9b43c31f4</id>
<content type='text'>
OPAL can handle various interrupt for us such as Machine Checks (it
performs all sorts of recovery tasks and passes back control to us with
informations about the error), Hardware Management Interrupts and Softpatch
interrupts.

This wires up the mechanisms and prints out specific informations returned
by HAL when a machine check occurs.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
</entry>
</feed>
