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<title>kernel.git/arch/parisc, branch linux-4.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.17.y'/>
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<updated>2018-08-24T11:07:16Z</updated>
<entry>
<title>parisc: Remove ordered stores from syscall.S</title>
<updated>2018-08-24T11:07:16Z</updated>
<author>
<name>John David Anglin</name>
</author>
<published>2018-08-12T20:38:03Z</published>
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<id>urn:sha1:5b75a91fc67fdb6a1b4b5acf58aa5bca5e6ac3ac</id>
<content type='text'>
commit 7797167ffde1f00446301cb22b37b7c03194cfaf upstream.

Now that we use a sync prior to releasing the locks in syscall.S, we don't need
the PA 2.0 ordered stores used to release some locks.  Using an ordered store,
potentially slows the release and subsequent code.

There are a number of other ordered stores and loads that serve no purpose.  I
have converted these to normal stores.

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Remove unnecessary barriers from spinlock.h</title>
<updated>2018-08-24T11:07:15Z</updated>
<author>
<name>John David Anglin</name>
</author>
<published>2018-08-12T20:31:17Z</published>
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<id>urn:sha1:5c9fc580b1bc23eb8a23fddbd67e82c29d2aadfe</id>
<content type='text'>
commit 3b885ac1dc35b87a39ee176a6c7e2af9c789d8b8 upstream.

Now that mb() is an instruction barrier, it will slow performance if we issue
unnecessary barriers.

The spinlock defines have a number of unnecessary barriers.  The __ldcw()
define is both a hardware and compiler barrier.  The mb() barriers in the
routines using __ldcw() serve no purpose.

The only barrier needed is the one in arch_spin_unlock().  We need to ensure
all accesses are complete prior to releasing the lock.

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Define mb() and add memory barriers to assembler unlock sequences</title>
<updated>2018-08-15T16:10:56Z</updated>
<author>
<name>John David Anglin</name>
</author>
<published>2018-08-05T17:30:31Z</published>
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<id>urn:sha1:f31d0592090f79fa2bb1ad1aced53fbf7aaad6ed</id>
<content type='text'>
commit fedb8da96355f5f64353625bf96dc69423ad1826 upstream.

For years I thought all parisc machines executed loads and stores in
order. However, Jeff Law recently indicated on gcc-patches that this is
not correct. There are various degrees of out-of-order execution all the
way back to the PA7xxx processor series (hit-under-miss). The PA8xxx
series has full out-of-order execution for both integer operations, and
loads and stores.

This is described in the following article:
http://web.archive.org/web/20040214092531/http://www.cpus.hp.com/technical_references/advperf.shtml

For this reason, we need to define mb() and to insert a memory barrier
before the store unlocking spinlocks. This ensures that all memory
accesses are complete prior to unlocking. The ldcw instruction performs
the same function on entry.

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Enable CONFIG_MLONGCALLS by default</title>
<updated>2018-08-15T16:10:56Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-07-28T09:47:17Z</published>
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<id>urn:sha1:8ab85f0bec9b334b78fe95224c66a88a0669f212</id>
<content type='text'>
commit 66509a276c8c1d19ee3f661a41b418d101c57d29 upstream.

Enable the -mlong-calls compiler option by default, because otherwise in most
cases linking the vmlinux binary fails due to truncations of R_PARISC_PCREL22F
relocations. This fixes building the 64-bit defconfig.

Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Move setup_profiling_timer() out of init section</title>
<updated>2018-05-18T14:21:49Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-05-18T14:12:12Z</published>
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<id>urn:sha1:01f56832cfb6fcc204e7203f46841b6185ebd574</id>
<content type='text'>
No other architecture has setup_profiling_timer() in the init section,
thus on parisc we face this section mismatch warning:
 Reference from the function devm_device_add_group() to the function .init.text:setup_profiling_timer()

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Move find_pa_parent_type() out of init section</title>
<updated>2018-05-18T14:21:48Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-05-18T14:08:10Z</published>
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<id>urn:sha1:3faf5246f0cd2c1fe82a2c4ba5ad857fa6941909</id>
<content type='text'>
The 0-DAY kernel test infrastructure reported that inet_put_port() may
reference the find_pa_parent_type() function, so it can't be moved into the
init section.

Fixes: b86db40e1ecc ("parisc: Move various functions and strings to init section")
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Fix section mismatches</title>
<updated>2018-05-02T19:47:35Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-04-20T21:23:37Z</published>
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<id>urn:sha1:8d73b18079613baf75019a920ce6a1ac0dac8b5b</id>
<content type='text'>
Fix three section mismatches:
1) Section mismatch in reference from the function ioread8() to the
   function .init.text:pcibios_init_bridge()
2) Section mismatch in reference from the function free_initmem() to the
   function .init.text:map_pages()
3) Section mismatch in reference from the function ccio_ioc_init() to
   the function .init.text:count_parisc_driver()

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: drivers.c: Fix section mismatches</title>
<updated>2018-05-02T19:47:27Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-04-20T21:19:17Z</published>
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<id>urn:sha1:b819439fea305a0bfd6ca23a7994fd1a8847c0d8</id>
<content type='text'>
Fix two section mismatches in drivers.c:
1) Section mismatch in reference from the function alloc_tree_node() to
   the function .init.text:create_tree_node().
2) Section mismatch in reference from the function walk_native_bus() to
   the function .init.text:alloc_pa_dev().

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: time: Convert read_persistent_clock() to read_persistent_clock64()</title>
<updated>2018-04-20T18:18:21Z</updated>
<author>
<name>Baolin Wang</name>
</author>
<published>2018-04-19T06:51:03Z</published>
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<id>urn:sha1:f76cdd00ef0e39d880139b074e3b247594dff95a</id>
<content type='text'>
The read_persistent_clock() uses a timespec, which is not year 2038 safe
on 32bit systems. On parisc architecture, we have implemented generic
RTC drivers that can be used to compensate the system suspend time, but
the RTC time can not represent the nanosecond resolution, so this patch
just converts to read_persistent_clock64() with timespec64.

Signed-off-by: Baolin Wang &lt;baolin.wang@linaro.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Document rules regarding checksum of HPMC handler</title>
<updated>2018-04-18T14:17:13Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-04-18T13:46:41Z</published>
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<id>urn:sha1:41dbee81c875300072f6154d6722f6e8e1353cca</id>
<content type='text'>
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
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