<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/parisc/kernel, branch linux-4.18.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.18.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.18.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2018-11-13T19:12:14Z</updated>
<entry>
<title>parisc: Fix exported address of os_hpmc handler</title>
<updated>2018-11-13T19:12:14Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-10-14T19:58:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1396c159647a058dc1714491bc37dad67db1468f'/>
<id>urn:sha1:1396c159647a058dc1714491bc37dad67db1468f</id>
<content type='text'>
commit 99a3ae51d557d8e38a7aece65678a31f9db215ee upstream.

In the C-code we need to put the physical address of the hpmc handler in
the interrupt vector table (IVA) in order to get HPMCs working.  Since
on parisc64 function pointers are indirect (in fact they are function
descriptors) we instead export the address as variable and not as
function.

This reverts a small part of commit f39cce654f9a ("parisc: Add
cfi_startproc and cfi_endproc to assembly code").

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Cc: &lt;stable@vger.kernel.org&gt;    [4.9+]
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Fix address in HPMC IVA</title>
<updated>2018-11-13T19:12:13Z</updated>
<author>
<name>John David Anglin</name>
</author>
<published>2018-10-06T17:11:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9ad0ecfd50338d8a3deb69c6dc942f510a1813a'/>
<id>urn:sha1:d9ad0ecfd50338d8a3deb69c6dc942f510a1813a</id>
<content type='text'>
commit 1138b6718ff74d2a934459643e3754423d23b5e2 upstream.

Helge noticed that the address of the os_hpmc handler was not being
correctly calculated in the hpmc macro.  As a result, PDCE_CHECK would
fail to call os_hpmc:

&lt;Cpu2&gt; e800009802e00000  0000000000000000  CC_ERR_CHECK_HPMC
&lt;Cpu2&gt; 37000f7302e00000  8040004000000000  CC_ERR_CPU_CHECK_SUMMARY
&lt;Cpu2&gt; f600105e02e00000  fffffff0f0c00000  CC_MC_HPMC_MONARCH_SELECTED
&lt;Cpu2&gt; 140003b202e00000  000000000000000b  CC_ERR_HPMC_STATE_ENTRY
&lt;Cpu2&gt; 5600100b02e00000  00000000000001a0  CC_MC_OS_HPMC_LEN_ERR
&lt;Cpu2&gt; 5600106402e00000  fffffff0f0438e70  CC_MC_BR_TO_OS_HPMC_FAILED
&lt;Cpu2&gt; e800009802e00000  0000000000000000  CC_ERR_CHECK_HPMC
&lt;Cpu2&gt; 37000f7302e00000  8040004000000000  CC_ERR_CPU_CHECK_SUMMARY
&lt;Cpu2&gt; 4000109f02e00000  0000000000000000  CC_MC_HPMC_INITIATED
&lt;Cpu2&gt; 4000101902e00000  0000000000000000  CC_MC_MULTIPLE_HPMCS
&lt;Cpu2&gt; 030010d502e00000  0000000000000000  CC_CPU_STOP

The address problem can be seen by dumping the fault vector:

0000000040159000 &lt;fault_vector_20&gt;:
    40159000:   63 6f 77 73     stb r15,-2447(dp)
    40159004:   20 63 61 6e     ldil L%b747000,r3
    40159008:   20 66 6c 79     ldil L%-1c3b3000,r3
        ...
    40159020:   08 00 02 40     nop
    40159024:   20 6e 60 02     ldil L%15d000,r3
    40159028:   34 63 00 00     ldo 0(r3),r3
    4015902c:   e8 60 c0 02     bv,n r0(r3)
    40159030:   08 00 02 40     nop
    40159034:   00 00 00 00     break 0,0
    40159038:   c0 00 70 00     bb,*&lt; r0,sar,40159840 &lt;fault_vector_20+0x840&gt;
    4015903c:   00 00 00 00     break 0,0

Location 40159038 should contain the physical address of os_hpmc:

000000004015d000 &lt;os_hpmc&gt;:
    4015d000:   08 1a 02 43     copy r26,r3
    4015d004:   01 c0 08 a4     mfctl iva,r4
    4015d008:   48 85 00 68     ldw 34(r4),r5

This patch moves the address setup into initialize_ivt to resolve the
above problem.  I tested the change by dumping the HPMC entry after setup:

0000000040209020:  8000240
0000000040209024: 206a2004
0000000040209028: 34630ac0
000000004020902c: e860c002
0000000040209030:  8000240
0000000040209034: 1bdddce6
0000000040209038:   15d000
000000004020903c:      1a0

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Remove ordered stores from syscall.S</title>
<updated>2018-08-24T11:04:50Z</updated>
<author>
<name>John David Anglin</name>
</author>
<published>2018-08-12T20:38:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=96be7bbde43137198a6044d6641babe4deb8dafa'/>
<id>urn:sha1:96be7bbde43137198a6044d6641babe4deb8dafa</id>
<content type='text'>
commit 7797167ffde1f00446301cb22b37b7c03194cfaf upstream.

Now that we use a sync prior to releasing the locks in syscall.S, we don't need
the PA 2.0 ordered stores used to release some locks.  Using an ordered store,
potentially slows the release and subsequent code.

There are a number of other ordered stores and loads that serve no purpose.  I
have converted these to normal stores.

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>parisc: Define mb() and add memory barriers to assembler unlock sequences</title>
<updated>2018-08-08T20:13:32Z</updated>
<author>
<name>John David Anglin</name>
</author>
<published>2018-08-05T17:30:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fedb8da96355f5f64353625bf96dc69423ad1826'/>
<id>urn:sha1:fedb8da96355f5f64353625bf96dc69423ad1826</id>
<content type='text'>
For years I thought all parisc machines executed loads and stores in
order. However, Jeff Law recently indicated on gcc-patches that this is
not correct. There are various degrees of out-of-order execution all the
way back to the PA7xxx processor series (hit-under-miss). The PA8xxx
series has full out-of-order execution for both integer operations, and
loads and stores.

This is described in the following article:
http://web.archive.org/web/20040214092531/http://www.cpus.hp.com/technical_references/advperf.shtml

For this reason, we need to define mb() and to insert a memory barrier
before the store unlocking spinlocks. This ensures that all memory
accesses are complete prior to unlocking. The ldcw instruction performs
the same function on entry.

Signed-off-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: stable@vger.kernel.org # 4.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Reduce debug output in unwind code</title>
<updated>2018-06-28T20:54:17Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-06-28T20:21:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=63ba82c0e63f1dd400d84e12f2142c2cb691aec1'/>
<id>urn:sha1:63ba82c0e63f1dd400d84e12f2142c2cb691aec1</id>
<content type='text'>
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Wire up io_pgetevents syscall</title>
<updated>2018-06-28T15:43:00Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2018-06-28T15:41:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2765b3edc41bdf18960ca7e6b656fb933ac191d6'/>
<id>urn:sha1:2765b3edc41bdf18960ca7e6b656fb933ac191d6</id>
<content type='text'>
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Convert printk(KERN_LEVEL) to pr_lvl()</title>
<updated>2018-06-28T15:14:44Z</updated>
<author>
<name>Andy Shevchenko</name>
</author>
<published>2018-05-29T19:38:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5e791d2e4785f9ec7da4a02b9e8d00dace9e6917'/>
<id>urn:sha1:5e791d2e4785f9ec7da4a02b9e8d00dace9e6917</id>
<content type='text'>
Convert printk(KERN_LEVEL) type of calls to pr_lvl() macros.

While here,
  - convert printk() to pr_info()
  - join back string literal to be on one line
  - use %*phN (note, it gives 1 byte more for sake of simplicity)

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace</title>
<updated>2018-06-04T22:23:48Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2018-06-04T22:23:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=93e95fa57441b6976b39029bd658b6bbe7ccfe28'/>
<id>urn:sha1:93e95fa57441b6976b39029bd658b6bbe7ccfe28</id>
<content type='text'>
Pull siginfo updates from Eric Biederman:
 "This set of changes close the known issues with setting si_code to an
  invalid value, and with not fully initializing struct siginfo. There
  remains work to do on nds32, arc, unicore32, powerpc, arm, arm64, ia64
  and x86 to get the code that generates siginfo into a simpler and more
  maintainable state. Most of that work involves refactoring the signal
  handling code and thus careful code review.

  Also not included is the work to shrink the in kernel version of
  struct siginfo. That depends on getting the number of places that
  directly manipulate struct siginfo under control, as it requires the
  introduction of struct kernel_siginfo for the in kernel things.

  Overall this set of changes looks like it is making good progress, and
  with a little luck I will be wrapping up the siginfo work next
  development cycle"

* 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace: (46 commits)
  signal/sh: Stop gcc warning about an impossible case in do_divide_error
  signal/mips: Report FPE_FLTUNK for undiagnosed floating point exceptions
  signal/um: More carefully relay signals in relay_signal.
  signal: Extend siginfo_layout with SIL_FAULT_{MCEERR|BNDERR|PKUERR}
  signal: Remove unncessary #ifdef SEGV_PKUERR in 32bit compat code
  signal/signalfd: Add support for SIGSYS
  signal/signalfd: Remove __put_user from signalfd_copyinfo
  signal/xtensa: Use force_sig_fault where appropriate
  signal/xtensa: Consistenly use SIGBUS in do_unaligned_user
  signal/um: Use force_sig_fault where appropriate
  signal/sparc: Use force_sig_fault where appropriate
  signal/sparc: Use send_sig_fault where appropriate
  signal/sh: Use force_sig_fault where appropriate
  signal/s390: Use force_sig_fault where appropriate
  signal/riscv: Replace do_trap_siginfo with force_sig_fault
  signal/riscv: Use force_sig_fault where appropriate
  signal/parisc: Use force_sig_fault where appropriate
  signal/parisc: Use force_sig_mceerr where appropriate
  signal/openrisc: Use force_sig_fault where appropriate
  signal/nios2: Use force_sig_fault where appropriate
  ...
</content>
</entry>
<entry>
<title>Merge tag 'dma-mapping-4.18' of git://git.infradead.org/users/hch/dma-mapping</title>
<updated>2018-06-04T17:58:12Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2018-06-04T17:58:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e5a594643a3444d39c1467040e638bf08a4e0db8'/>
<id>urn:sha1:e5a594643a3444d39c1467040e638bf08a4e0db8</id>
<content type='text'>
Pull dma-mapping updates from Christoph Hellwig:

 - replace the force_dma flag with a dma_configure bus method. (Nipun
   Gupta, although one patch is іncorrectly attributed to me due to a
   git rebase bug)

 - use GFP_DMA32 more agressively in dma-direct. (Takashi Iwai)

 - remove PCI_DMA_BUS_IS_PHYS and rely on the dma-mapping API to do the
   right thing for bounce buffering.

 - move dma-debug initialization to common code, and apply a few
   cleanups to the dma-debug code.

 - cleanup the Kconfig mess around swiotlb selection

 - swiotlb comment fixup (Yisheng Xie)

 - a trivial swiotlb fix. (Dan Carpenter)

 - support swiotlb on RISC-V. (based on a patch from Palmer Dabbelt)

 - add a new generic dma-noncoherent dma_map_ops implementation and use
   it for arc, c6x and nds32.

 - improve scatterlist validity checking in dma-debug. (Robin Murphy)

 - add a struct device quirk to limit the dma-mask to 32-bit due to
   bridge/system issues, and switch x86 to use it instead of a local
   hack for VIA bridges.

 - handle devices without a dma_mask more gracefully in the dma-direct
   code.

* tag 'dma-mapping-4.18' of git://git.infradead.org/users/hch/dma-mapping: (48 commits)
  dma-direct: don't crash on device without dma_mask
  nds32: use generic dma_noncoherent_ops
  nds32: implement the unmap_sg DMA operation
  nds32: consolidate DMA cache maintainance routines
  x86/pci-dma: switch the VIA 32-bit DMA quirk to use the struct device flag
  x86/pci-dma: remove the explicit nodac and allowdac option
  x86/pci-dma: remove the experimental forcesac boot option
  Documentation/x86: remove a stray reference to pci-nommu.c
  core, dma-direct: add a flag 32-bit dma limits
  dma-mapping: remove unused gfp_t parameter to arch_dma_alloc_attrs
  dma-debug: check scatterlist segments
  c6x: use generic dma_noncoherent_ops
  arc: use generic dma_noncoherent_ops
  arc: fix arc_dma_{map,unmap}_page
  arc: fix arc_dma_sync_sg_for_{cpu,device}
  arc: simplify arc_dma_sync_single_for_{cpu,device}
  dma-mapping: provide a generic dma-noncoherent implementation
  dma-mapping: simplify Kconfig dependencies
  riscv: add swiotlb support
  riscv: only enable ZONE_DMA32 for 64-bit
  ...
</content>
</entry>
<entry>
<title>Merge branch 'hch.procfs' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs</title>
<updated>2018-06-04T17:00:01Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2018-06-04T17:00:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cf626b0da78df6669c6b5f51ddd9a70a0702e579'/>
<id>urn:sha1:cf626b0da78df6669c6b5f51ddd9a70a0702e579</id>
<content type='text'>
Pull procfs updates from Al Viro:
 "Christoph's proc_create_... cleanups series"

* 'hch.procfs' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (44 commits)
  xfs, proc: hide unused xfs procfs helpers
  isdn/gigaset: add back gigaset_procinfo assignment
  proc: update SIZEOF_PDE_INLINE_NAME for the new pde fields
  tty: replace -&gt;proc_fops with -&gt;proc_show
  ide: replace -&gt;proc_fops with -&gt;proc_show
  ide: remove ide_driver_proc_write
  isdn: replace -&gt;proc_fops with -&gt;proc_show
  atm: switch to proc_create_seq_private
  atm: simplify procfs code
  bluetooth: switch to proc_create_seq_data
  netfilter/x_tables: switch to proc_create_seq_private
  netfilter/xt_hashlimit: switch to proc_create_{seq,single}_data
  neigh: switch to proc_create_seq_data
  hostap: switch to proc_create_{seq,single}_data
  bonding: switch to proc_create_seq_data
  rtc/proc: switch to proc_create_single_data
  drbd: switch to proc_create_single
  resource: switch to proc_create_seq_data
  staging/rtl8192u: simplify procfs code
  jfs: simplify procfs code
  ...
</content>
</entry>
</feed>
