<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/parisc/include, branch linux-6.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y'/>
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<updated>2023-08-16T16:32:18Z</updated>
<entry>
<title>parisc: Fix lightweight spinlock checks to not break futexes</title>
<updated>2023-08-16T16:32:18Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2023-08-09T07:21:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=24555c3794bcb8f3b93f88105972848a4f0888aa'/>
<id>urn:sha1:24555c3794bcb8f3b93f88105972848a4f0888aa</id>
<content type='text'>
commit a0f4b7879f2e14986200747d1b545e5daac8c624 upstream.

The lightweight spinlock checks verify that a spinlock has either value
0 (spinlock locked) and that not any other bits than in
__ARCH_SPIN_LOCK_UNLOCKED_VAL is set.

This breaks the current LWS code, which writes the address of the lock
into the lock word to unlock it, which was an optimization to save one
assembler instruction.

Fix it by making spinlock_types.h accessible for asm code, change the
LWS spinlock-unlocking code to write __ARCH_SPIN_LOCK_UNLOCKED_VAL into
the lock word, and add some missing lightweight spinlock checks to the
LWS path. Finally, make the spinlock checks dependend on DEBUG_KERNEL.

Noticed-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Tested-by: John David Anglin &lt;dave.anglin@bell.net&gt;
Cc: stable@vger.kernel.org # v6.4+
Fixes: 15e64ef6520e ("parisc: Add lightweight spinlock checks")
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>init: Remove check_bugs() leftovers</title>
<updated>2023-08-08T18:04:49Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2023-08-01T14:07:11Z</published>
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<id>urn:sha1:f9a4f2ba337c776b93aa8c7f65fc677f4663e327</id>
<content type='text'>
commit 61235b24b9cb37c13fcad5b9596d59a1afdcec30 upstream

Everything is converted over to arch_cpu_finalize_init(). Remove the
check_bugs() leftovers including the empty stubs in asm-generic, alpha,
parisc, powerpc and xtensa.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Link: https://lore.kernel.org/r/20230613224545.553215951@linutronix.de
Signed-off-by: Daniel Sneddon &lt;daniel.sneddon@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>parisc: Delete redundant register definitions in &lt;asm/assembly.h&gt;</title>
<updated>2023-06-17T04:48:11Z</updated>
<author>
<name>Ben Hutchings</name>
</author>
<published>2023-06-14T22:00:02Z</published>
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<id>urn:sha1:b5b2a02bcaac7c287694aa0db4837a07bf178626</id>
<content type='text'>
We define sp and ipsw in &lt;asm/asmregs.h&gt; using ".reg", and when using
current binutils (snapshot 2.40.50.20230611) the definitions in
&lt;asm/assembly.h&gt; using "=" conflict with those:

arch/parisc/include/asm/assembly.h: Assembler messages:
arch/parisc/include/asm/assembly.h:93: Error: symbol `sp' is already defined
arch/parisc/include/asm/assembly.h:95: Error: symbol `ipsw' is already defined

Delete the duplicate definitions in &lt;asm/assembly.h&gt;.

Also delete the definition of gp, which isn't used anywhere.

Signed-off-by: Ben Hutchings &lt;benh@debian.org&gt;
Cc: stable@vger.kernel.org # v6.0+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Fix flush_dcache_page() for usage from irq context</title>
<updated>2023-05-24T17:03:49Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2023-05-24T15:07:07Z</published>
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<id>urn:sha1:61e150fb310729c98227a5edf6e4a3619edc3702</id>
<content type='text'>
Since at least kernel 6.1, flush_dcache_page() is called with IRQs
disabled, e.g. from aio_complete().

But the current implementation for flush_dcache_page() on parisc
unintentionally re-enables IRQs, which may lead to deadlocks.

Fix it by using xa_lock_irqsave() and xa_unlock_irqrestore()
for the flush_dcache_mmap_*lock() macros instead.

Cc: linux-parisc@vger.kernel.org
Cc: stable@kernel.org # 5.18+
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Add lightweight spinlock checks</title>
<updated>2023-05-24T12:23:07Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2023-05-22T13:11:16Z</published>
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<id>urn:sha1:15e64ef6520ea8702998db05b87fa5c3d3d40710</id>
<content type='text'>
Add a lightweight spinlock check which uses only two instructions
per spinlock call. It detects if a spinlock has been trashed by
some memory corruption and then halts the kernel. It will not detect
uninitialized spinlocks, for which CONFIG_DEBUG_SPINLOCK needs to
be enabled.

This lightweight spinlock check shouldn't influence runtime, so it's
safe to enable it by default.

The __ARCH_SPIN_LOCK_UNLOCKED_VAL constant has been choosen small enough
to be able to be loaded by one LDI assembler statement.

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Fix encoding of swp_entry due to added SWP_EXCLUSIVE flag</title>
<updated>2023-05-14T00:04:27Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2023-05-13T20:30:06Z</published>
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<id>urn:sha1:6f9e98849edaa8aefc4030ff3500e41556e83ff7</id>
<content type='text'>
Fix the __swp_offset() and __swp_entry() macros due to commit 6d239fc78c0b
("parisc/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE") which introduced the
SWP_EXCLUSIVE flag by reusing the _PAGE_ACCESSED flag.

Reported-by: Christoph Biedl &lt;linux-kernel.bfrz@manchmal.in-ulm.de&gt;
Tested-by: Christoph Biedl &lt;linux-kernel.bfrz@manchmal.in-ulm.de&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Fixes: 6d239fc78c0b ("parisc/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE")
Cc: &lt;stable@vger.kernel.org&gt; # v6.3+
</content>
</entry>
<entry>
<title>Merge tag 'locking-core-2023-05-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2023-05-05T19:56:55Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-05-05T19:56:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b115d85a9584c98f9a7dec209d835462aa1adc09'/>
<id>urn:sha1:b115d85a9584c98f9a7dec209d835462aa1adc09</id>
<content type='text'>
Pull locking updates from Ingo Molnar:

 - Introduce local{,64}_try_cmpxchg() - a slightly more optimal
   primitive, which will be used in perf events ring-buffer code

 - Simplify/modify rwsems on PREEMPT_RT, to address writer starvation

 - Misc cleanups/fixes

* tag 'locking-core-2023-05-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  locking/atomic: Correct (cmp)xchg() instrumentation
  locking/x86: Define arch_try_cmpxchg_local()
  locking/arch: Wire up local_try_cmpxchg()
  locking/generic: Wire up local{,64}_try_cmpxchg()
  locking/atomic: Add generic try_cmpxchg{,64}_local() support
  locking/rwbase: Mitigate indefinite writer starvation
  locking/arch: Rename all internal __xchg() names to __arch_xchg()
</content>
</entry>
<entry>
<title>parisc: Drop HP-UX constants and structs from grfioctl.h</title>
<updated>2023-05-03T15:43:26Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2023-04-23T19:37:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=653f3ea73bf3e03070d370300805eee4f2a47bd9'/>
<id>urn:sha1:653f3ea73bf3e03070d370300805eee4f2a47bd9</id>
<content type='text'>
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Replace regular spinlock with spin_trylock on panic path</title>
<updated>2023-05-03T15:43:26Z</updated>
<author>
<name>Guilherme G. Piccoli</name>
</author>
<published>2023-02-20T21:11:05Z</published>
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<id>urn:sha1:829632dae8321787525ee37dc4828bbe6edafdae</id>
<content type='text'>
The panic notifiers' callbacks execute in an atomic context, with
interrupts/preemption disabled, and all CPUs not running the panic
function are off, so it's very dangerous to wait on a regular
spinlock, there's a risk of deadlock.

Refactor the panic notifier of parisc/power driver to make use
of spin_trylock - for that, we've added a second version of the
soft-power function. Also, some comments were reorganized and
trailing white spaces, useless header inclusion and blank lines
were removed.

Cc: "James E.J. Bottomley" &lt;James.Bottomley@HansenPartnership.com&gt;
Cc: Jeroen Roovers &lt;jer@xs4all.nl&gt;
Acked-by: Helge Deller &lt;deller@gmx.de&gt; # parisc
Signed-off-by: Guilherme G. Piccoli &lt;gpiccoli@igalia.com&gt;
Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
<entry>
<title>parisc: Limit amount of kgdb breakpoints on parisc</title>
<updated>2023-05-03T15:41:21Z</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2022-12-28T07:41:54Z</published>
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<id>urn:sha1:82da62abe56263319a974a4d77c1e6fa19355de1</id>
<content type='text'>
kgdb is rarely used and 40 breakpoints seems enough to debug
parisc specific bugs.

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
</content>
</entry>
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