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<title>kernel.git/arch/openrisc, branch linux-6.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y</id>
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<updated>2023-07-23T11:53:45Z</updated>
<entry>
<title>openrisc: Union fpcsr and oldmask in sigcontext to unbreak userspace ABI</title>
<updated>2023-07-23T11:53:45Z</updated>
<author>
<name>Stafford Horne</name>
</author>
<published>2023-06-28T16:54:40Z</published>
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<id>urn:sha1:ed60a9c421991c30faf4876c06d551d8132606fc</id>
<content type='text'>
[ Upstream commit dceaafd668812115037fc13a1893d068b7b880f5 ]

With commit 27267655c531 ("openrisc: Support floating point user api") I
added an entry to the struct sigcontext which caused an unwanted change
to the userspace ABI.

To fix this we use the previously unused oldmask field space for the
floating point fpcsr state.  We do this with a union to restore the ABI
back to the pre kernel v6.4 ABI and keep API compatibility.

This does mean if there is some code somewhere that is setting oldmask
in an OpenRISC specific userspace sighandler it would end up setting the
floating point register status, but I think it's unlikely as oldmask was
never functional before.

Fixes: 27267655c531 ("openrisc: Support floating point user api")
Reported-by: Szabolcs Nagy &lt;nsz@port70.net&gt;
Closes: https://lore.kernel.org/openrisc/20230626213840.GA1236108@port70.net/
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mm: always expand the stack with the mmap write lock held</title>
<updated>2023-07-01T11:12:40Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-06-24T20:45:51Z</published>
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<id>urn:sha1:fb32951c89030c5f9944ca8aa10301d7eb733b49</id>
<content type='text'>
commit 8d7071af890768438c14db6172cc8f9f4d04e184 upstream.

This finishes the job of always holding the mmap write lock when
extending the user stack vma, and removes the 'write_locked' argument
from the vm helper functions again.

For some cases, we just avoid expanding the stack at all: drivers and
page pinning really shouldn't be extending any stacks.  Let's see if any
strange users really wanted that.

It's worth noting that architectures that weren't converted to the new
lock_mm_and_find_vma() helper function are left using the legacy
"expand_stack()" function, but it has been changed to drop the mmap_lock
and take it for writing while expanding the vma.  This makes it fairly
straightforward to convert the remaining architectures.

As a result of dropping and re-taking the lock, the calling conventions
for this function have also changed, since the old vma may no longer be
valid.  So it will now return the new vma if successful, and NULL - and
the lock dropped - if the area could not be extended.

Tested-by: Vegard Nossum &lt;vegard.nossum@oracle.com&gt;
Tested-by: John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt; # ia64
Tested-by: Frank Scheiner &lt;frank.scheiner@web.de&gt; # ia64
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'locking-core-2023-05-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2023-05-05T19:56:55Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-05-05T19:56:55Z</published>
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<id>urn:sha1:b115d85a9584c98f9a7dec209d835462aa1adc09</id>
<content type='text'>
Pull locking updates from Ingo Molnar:

 - Introduce local{,64}_try_cmpxchg() - a slightly more optimal
   primitive, which will be used in perf events ring-buffer code

 - Simplify/modify rwsems on PREEMPT_RT, to address writer starvation

 - Misc cleanups/fixes

* tag 'locking-core-2023-05-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  locking/atomic: Correct (cmp)xchg() instrumentation
  locking/x86: Define arch_try_cmpxchg_local()
  locking/arch: Wire up local_try_cmpxchg()
  locking/generic: Wire up local{,64}_try_cmpxchg()
  locking/atomic: Add generic try_cmpxchg{,64}_local() support
  locking/rwbase: Mitigate indefinite writer starvation
  locking/arch: Rename all internal __xchg() names to __arch_xchg()
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of https://github.com/openrisc/linux</title>
<updated>2023-05-01T18:52:32Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-05-01T18:52:32Z</published>
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<id>urn:sha1:d75439d64a1e2b35e0f08906205b00279753cbed</id>
<content type='text'>
Pull OpenRISC updates from Stafford Horne:
 "Two things for OpenRISC this cycle:

   - Small cleanup for device tree cpu iteration from Rob Herring

   - Add support for storing, restoring and accessing user space FPU
     state, to allow for libc to support the FPU on OpenRISC"

* tag 'for-linus' of https://github.com/openrisc/linux:
  openrisc: Add floating point regset
  openrisc: Support floating point user api
  openrisc: Support storing and restoring fpu state
  openrisc: Properly store r31 to pt_regs on unhandled exceptions
  openrisc: Use common of_get_cpu_node() instead of open-coding
</content>
</entry>
<entry>
<title>locking/arch: Rename all internal __xchg() names to __arch_xchg()</title>
<updated>2023-04-29T07:08:44Z</updated>
<author>
<name>Andrzej Hajda</name>
</author>
<published>2023-01-18T15:44:44Z</published>
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<id>urn:sha1:068550631fbe0b7fb41625cea6fb204fdc8cb224</id>
<content type='text'>
Decrease the probability of this internal facility to be used by
driver code.

Signed-off-by: Andrzej Hajda &lt;andrzej.hajda@intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt; [m68k]
Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt; [riscv]
Link: https://lore.kernel.org/r/20230118154450.73842-1-andrzej.hajda@intel.com
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>openrisc: Add floating point regset</title>
<updated>2023-04-26T14:08:06Z</updated>
<author>
<name>Stafford Horne</name>
</author>
<published>2023-04-14T07:31:08Z</published>
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<id>urn:sha1:c91b4a07655d5ba67962a08dfac8bd7f45ad049c</id>
<content type='text'>
Define REGSET_FPU to allow reading and writing the FPCSR fpu state
register.  This will be used primarily by debuggers like GDB.

Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
<entry>
<title>openrisc: Support floating point user api</title>
<updated>2023-04-26T14:08:06Z</updated>
<author>
<name>Stafford Horne</name>
</author>
<published>2023-04-14T07:27:51Z</published>
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<id>urn:sha1:27267655c5313ba0f5a3caa9ad35d887d9a12574</id>
<content type='text'>
Add support for handling floating point exceptions and forwarding the
SIGFPE signal to processes.  Also, add fpu state to sigcontext.

Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
<entry>
<title>openrisc: Support storing and restoring fpu state</title>
<updated>2023-04-26T14:08:06Z</updated>
<author>
<name>Stafford Horne</name>
</author>
<published>2023-04-14T07:25:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=63d7f9f11e5e81de2ce8f1c7a8aaed5b0288eddf'/>
<id>urn:sha1:63d7f9f11e5e81de2ce8f1c7a8aaed5b0288eddf</id>
<content type='text'>
OpenRISC floating point state is not so expensive to save as OpenRISC uses
general purpose registers for floating point instructions.  We need to save
only the floating point status and control register, FPCSR.

Add support to maintain the FPCSR unconditionally upon exceptions and
switches.  On machines that do not support FPU this will always just
store 0x0 and restore is a no-op.  On FPU systems this adds an
additional special purpose register read/write and read/write to memory
(already cached).

Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
<entry>
<title>openrisc: Properly store r31 to pt_regs on unhandled exceptions</title>
<updated>2023-04-26T14:08:06Z</updated>
<author>
<name>Stafford Horne</name>
</author>
<published>2023-02-11T10:14:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=812489ac4dd91144a74ce65ecf232252a2e406fb'/>
<id>urn:sha1:812489ac4dd91144a74ce65ecf232252a2e406fb</id>
<content type='text'>
In commit 91993c8c2ed5 ("openrisc: use shadow registers to save regs on
exception") the unhandled exception path was changed to do an early
store of r30 instead of r31.  The entry code was not updated and r31 is
not getting stored to pt_regs.

This patch updates the entry handler to store r31 instead of r30.  We
also remove some misleading commented out store r30 and r31
instructrions.

I noticed this while working on adding floating point exception
handling,  This issue probably would never impact anything since we kill
the process or Oops right away on unhandled exceptions.

Fixes: 91993c8c2ed5 ("openrisc: use shadow registers to save regs on exception")
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
<entry>
<title>openrisc: Use common of_get_cpu_node() instead of open-coding</title>
<updated>2023-04-01T05:40:27Z</updated>
<author>
<name>Rob Herring</name>
</author>
<published>2023-03-27T18:28:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1aff44abf68a8000fcb3502fc2b704f20de4535f'/>
<id>urn:sha1:1aff44abf68a8000fcb3502fc2b704f20de4535f</id>
<content type='text'>
The common of_get_cpu_node() is equivalent to setup_find_cpu_node(), so
use it instead.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
</entry>
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