<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/mips/mm, branch linux-6.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.9.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.9.y'/>
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<updated>2024-02-20T11:41:52Z</updated>
<entry>
<title>MIPS: tlbex: Use GPR number macros</title>
<updated>2024-02-20T11:41:52Z</updated>
<author>
<name>Jiaxun Yang</name>
</author>
<published>2024-02-09T18:07:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8cc461b85feb5444a78ecbd0d81a70ebfb507574'/>
<id>urn:sha1:8cc461b85feb5444a78ecbd0d81a70ebfb507574</id>
<content type='text'>
Use GPR number macros in uasm code generation parts to
reduce code duplication.

No functional change.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: page: Use GPR number macros</title>
<updated>2024-02-20T11:41:52Z</updated>
<author>
<name>Jiaxun Yang</name>
</author>
<published>2024-02-09T18:07:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6aec8e0502febd5eab4d257e9afacfa86ccd3374'/>
<id>urn:sha1:6aec8e0502febd5eab4d257e9afacfa86ccd3374</id>
<content type='text'>
Use GPR number macros in uasm code generation parts to
reduce code duplication.

No functional change.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Unify define of CP0 registers for uasm code</title>
<updated>2024-02-20T11:41:51Z</updated>
<author>
<name>Jiaxun Yang</name>
</author>
<published>2024-02-09T18:07:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a77dabc8e8e4686f542f35e9e3ef09310b018b23'/>
<id>urn:sha1:a77dabc8e8e4686f542f35e9e3ef09310b018b23</id>
<content type='text'>
Definitions of uasm variant of CP0 registers are unified to
mipsregs.h, so they lay together with uasm variant of
the code.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'iommu-updates-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu</title>
<updated>2024-01-18T23:16:57Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2024-01-18T23:16:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0dde2bf67bcf37f54c829c6c42fa8c4fca78a224'/>
<id>urn:sha1:0dde2bf67bcf37f54c829c6c42fa8c4fca78a224</id>
<content type='text'>
Pull iommu updates from Joerg Roedel:
 "Core changes:
   - Fix race conditions in device probe path
   - Retire IOMMU bus_ops
   - Support for passing custom allocators to page table drivers
   - Clean up Kconfig around IOMMU_SVA
   - Support for sharing SVA domains with all devices bound to a mm
   - Firmware data parsing cleanup
   - Tracing improvements for iommu-dma code
   - Some smaller fixes and cleanups

  ARM-SMMU drivers:
   - Device-tree binding updates:
      - Add additional compatible strings for Qualcomm SoCs
      - Document Adreno clocks for Qualcomm's SM8350 SoC
   - SMMUv2:
      - Implement support for the -&gt;domain_alloc_paging() callback
      - Ensure Secure context is restored following suspend of Qualcomm
        SMMU implementation
   - SMMUv3:
      - Disable stalling mode for the "quiet" context descriptor
      - Minor refactoring and driver cleanups

  Intel VT-d driver:
   - Cleanup and refactoring

  AMD IOMMU driver:
   - Improve IO TLB invalidation logic
   - Small cleanups and improvements

  Rockchip IOMMU driver:
   - DT binding update to add Rockchip RK3588

  Apple DART driver:
   - Apple M1 USB4/Thunderbolt DART support
   - Cleanups

  Virtio IOMMU driver:
   - Add support for iotlb_sync_map
   - Enable deferred IO TLB flushes"

* tag 'iommu-updates-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (66 commits)
  iommu: Don't reserve 0-length IOVA region
  iommu/vt-d: Move inline helpers to header files
  iommu/vt-d: Remove unused vcmd interfaces
  iommu/vt-d: Remove unused parameter of intel_pasid_setup_pass_through()
  iommu/vt-d: Refactor device_to_iommu() to retrieve iommu directly
  iommu/sva: Fix memory leak in iommu_sva_bind_device()
  dt-bindings: iommu: rockchip: Add Rockchip RK3588
  iommu/dma: Trace bounce buffer usage when mapping buffers
  iommu/arm-smmu: Convert to domain_alloc_paging()
  iommu/arm-smmu: Pass arm_smmu_domain to internal functions
  iommu/arm-smmu: Implement IOMMU_DOMAIN_BLOCKED
  iommu/arm-smmu: Convert to a global static identity domain
  iommu/arm-smmu: Reorganize arm_smmu_domain_add_master()
  iommu/arm-smmu-v3: Remove ARM_SMMU_DOMAIN_NESTED
  iommu/arm-smmu-v3: Master cannot be NULL in arm_smmu_write_strtab_ent()
  iommu/arm-smmu-v3: Add a type for the STE
  iommu/arm-smmu-v3: disable stall for quiet_cd
  iommu/qcom: restore IOMMU state if needed
  iommu/arm-smmu-qcom: Add QCM2290 MDSS compatible
  iommu/arm-smmu-qcom: Add missing GMU entry to match table
  ...
</content>
</entry>
<entry>
<title>Merge tag 'mips_6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2024-01-17T19:20:50Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2024-01-17T19:20:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=096f286ee3fadf3f6777dedba35fa66654ec9f34'/>
<id>urn:sha1:096f286ee3fadf3f6777dedba35fa66654ec9f34</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:
 "Just cleanups and fixes"

* tag 'mips_6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Alchemy: Fix an out-of-bound access in db1550_dev_setup()
  MIPS: Alchemy: Fix an out-of-bound access in db1200_dev_setup()
  MIPS: Fix typos
  MIPS: Remove unused shadow GPR support from vector irq setup
  MIPS: Allow vectored interrupt handler to reside everywhere for 64bit
  mips: Set dump-stack arch description
  mips: mm: add slab availability checking in ioremap_prot
  mips: Optimize max_mapnr init procedure
  mips: Fix max_mapnr being uninitialized on early stages
  mips: Fix incorrect max_low_pfn adjustment
  mips: dmi: Fix early remap on MIPS32
  MIPS: compressed: Use correct instruction for 64 bit code
  MIPS: SGI-IP27: hubio: fix nasid kernel-doc warning
  MAINTAINERS: Add myself as maintainer of the Ralink architecture
</content>
</entry>
<entry>
<title>MIPS: Fix typos</title>
<updated>2024-01-08T09:39:12Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2024-01-03T23:16:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2f9060b1db4aa2c21c248e34476d8936a2b69cf6'/>
<id>urn:sha1:2f9060b1db4aa2c21c248e34476d8936a2b69cf6</id>
<content type='text'>
Fix typos, most reported by "codespell arch/mips".  Only touches comments,
no code changes.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: linux-mips@vger.kernel.org
Reviewed-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: mm: add slab availability checking in ioremap_prot</title>
<updated>2023-12-21T14:32:46Z</updated>
<author>
<name>Serge Semin</name>
</author>
<published>2023-12-02T11:14:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e540b8c5da04c66ff610d3bf84a7566d9f6bffcf'/>
<id>urn:sha1:e540b8c5da04c66ff610d3bf84a7566d9f6bffcf</id>
<content type='text'>
Recent commit a5f616483110 ("mm/ioremap: add slab availability checking in
ioremap_prot") added the slab availability check to the generic
ioremap_prot() implementation. It is reasonable to be done for the
MIPS32-specific method too since it also relies on the
get_vm_area_caller() function (by means of get_vm_area()) which requires
the slab allocator being up and running before being called.

Signed-off-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: Optimize max_mapnr init procedure</title>
<updated>2023-12-21T14:32:23Z</updated>
<author>
<name>Serge Semin</name>
</author>
<published>2023-12-02T11:14:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1c0150229f6a658687c245dfc4dcfa3fae69df49'/>
<id>urn:sha1:1c0150229f6a658687c245dfc4dcfa3fae69df49</id>
<content type='text'>
max_mapnr defines the upper boundary of the pages space in the system.
Currently in case if HIGHMEM is available it's calculated based on the
upper high memory PFN limit value. Seeing there is a case when it isn't
fully correct let's optimize out the max_mapnr variable initialization
procedure to cover all the handled in the paging_init() method cases:
1. If CPU has DC-aliases, then high memory is unavailable so the PFNs
upper boundary is determined by max_low_pfn.
2. Otherwise if high memory is available, use highend_pfn value
representing the upper high memory PFNs limit.
3. Otherwise no high memory is available so set max_mapnr with the
low-memory upper limit.

Signed-off-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: Fix max_mapnr being uninitialized on early stages</title>
<updated>2023-12-21T14:32:09Z</updated>
<author>
<name>Serge Semin</name>
</author>
<published>2023-12-02T11:14:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e1a9ae45736989c972a8d1c151bc390678ae6205'/>
<id>urn:sha1:e1a9ae45736989c972a8d1c151bc390678ae6205</id>
<content type='text'>
max_mapnr variable is utilized in the pfn_valid() method in order to
determine the upper PFN space boundary. Having it uninitialized
effectively makes any PFN passed to that method invalid. That in its turn
causes the kernel mm-subsystem occasion malfunctions even after the
max_mapnr variable is actually properly updated. For instance,
pfn_valid() is called in the init_unavailable_range() method in the
framework of the calls-chain on MIPS:
setup_arch()
+-&gt; paging_init()
    +-&gt; free_area_init()
        +-&gt; memmap_init()
            +-&gt; memmap_init_zone_range()
                +-&gt; init_unavailable_range()

Since pfn_valid() always returns "false" value before max_mapnr is
initialized in the mem_init() method, any flatmem page-holes will be left
in the poisoned/uninitialized state including the IO-memory pages. Thus
any further attempts to map/remap the IO-memory by using MMU may fail.
In particular it happened in my case on attempt to map the SRAM region.
The kernel bootup procedure just crashed on the unhandled unaligned access
bug raised in the __update_cache() method:

&gt; Unhandled kernel unaligned access[#1]:
&gt; CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.7.0-rc1-XXX-dirty #2056
&gt; ...
&gt; Call Trace:
&gt; [&lt;8011ef9c&gt;] __update_cache+0x88/0x1bc
&gt; [&lt;80385944&gt;] ioremap_page_range+0x110/0x2a4
&gt; [&lt;80126948&gt;] ioremap_prot+0x17c/0x1f4
&gt; [&lt;80711b80&gt;] __devm_ioremap+0x8c/0x120
&gt; [&lt;80711e0c&gt;] __devm_ioremap_resource+0xf4/0x218
&gt; [&lt;808bf244&gt;] sram_probe+0x4f4/0x930
&gt; [&lt;80889d20&gt;] platform_probe+0x68/0xec
&gt; ...

Let's fix the problem by initializing the max_mapnr variable as soon as
the required data is available. In particular it can be done right in the
paging_init() method before free_area_init() is called since all the PFN
zone boundaries have already been calculated by that time.

Cc: stable@vger.kernel.org
Signed-off-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: fix r3k_cache_init build regression</title>
<updated>2023-12-20T23:02:57Z</updated>
<author>
<name>Arnd Bergmann</name>
</author>
<published>2023-12-14T20:54:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bbe4f634f48cd832aa43e7f5a4edc7494ef7ff5f'/>
<id>urn:sha1:bbe4f634f48cd832aa43e7f5a4edc7494ef7ff5f</id>
<content type='text'>
My earlier patch removed __weak function declarations that used to be
turned into wild branches by the linker, instead causing a link failure
when the called functions are unavailable:

mips-linux-ld: arch/mips/mm/cache.o: in function `cpu_cache_init':
cache.c:(.text+0x670): undefined reference to `r3k_cache_init'

The __weak method seems suboptimal, so rather than putting that back, make
the function calls conditional on the Kconfig symbol that controls the
compilation.

[akpm@linux-foundation.org: fix whitespace while we're in there]
Link: https://lkml.kernel.org/r/20231214205506.310402-1-arnd@kernel.org
Fixes: 66445677f01e ("mips: move cache declarations into header")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reported-by: kernelci.org bot &lt;bot@kernelci.org&gt;
Cc: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Cc: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: Zi Yan &lt;ziy@nvidia.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
</content>
</entry>
</feed>
