MIPS: Fix build errors in sc-mips.c

2010-12-17T19:44:35Z

Seen with malta_defconfig on Linus' tree: CC arch/mips/mm/sc-mips.o arch/mips/mm/sc-mips.c: In function 'mips_sc_is_activated': arch/mips/mm/sc-mips.c:77: error: 'config2' undeclared (first use in this function) arch/mips/mm/sc-mips.c:77: error: (Each undeclared identifier is reported only once arch/mips/mm/sc-mips.c:77: error: for each function it appears in.) arch/mips/mm/sc-mips.c:81: error: 'tmp' undeclared (first use in this function) make[2]: *** [arch/mips/mm/sc-mips.o] Error 1 make[1]: *** [arch/mips/mm] Error 2 make: *** [arch/mips] Error 2 [Ralf: Cosmetic changes to minimize the number of arguments passed to mips_sc_is_activated] Signed-off-by: Kevin Cernekee Patchwork: https://patchwork.linux-mips.org/patch/1752/ Signed-off-by: Ralf Baechle

MIPS: Rename mips_dma_cache_sync back to dma_cache_sync

2010-12-16T18:11:01Z

This fixes IP22 and IP28 build errors. Signed-off-by: Ralf Baechle

MIPS: Honor L2 bypass bit

2010-10-29T18:08:52Z

On many of the newer MIPS32 cores, CP0 CONFIG2 bit 12 (L2B) indicates that the L2 cache is disabled and therefore Linux should not attempt to use it. [Ralf: Moved the code added by Kevin's original patch into a separate function that can easily be replaced for platforms that need more a different probe.] Signed-off-by: Kevin Cernekee Cc: linux-mips@linux-mips.org> Cc: Patchwork: https://patchwork.linux-mips.org/patch/1723/ Signed-off-by: Ralf Baechle

MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code

2010-10-29T18:08:50Z

BMIPS processor cores are used in 50+ different chipsets spread across 5+ product lines. In many cases the chipsets do not share the same peripheral register layouts, the same register blocks, the same interrupt controllers, the same memory maps, or much of anything else. But, across radically different SoCs that share nothing more than the same BMIPS CPU, a few things are still mostly constant: SMP operations Access to performance counters DMA cache coherency quirks Cache and memory bus configuration So, it makes sense to treat each BMIPS processor type as a generic "building block," rather than tying it to a specific SoC. This makes it easier to support a large number of BMIPS-based chipsets without unnecessary duplication of code, and provides the infrastructure needed to support BMIPS-proprietary features. Signed-off-by: Kevin Cernekee Cc: mbizon@freebox.fr Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Tested-by: Florian Fainelli Patchwork: https://patchwork.linux-mips.org/patch/1706/ Signed-off-by: Ralf Baechle

MIPS: add support for software performance events

2010-10-29T18:08:48Z

Software events are required as part of the measurable stuff by the Linux performance counter subsystem. Here is the list of events added by this patch: PERF_COUNT_SW_PAGE_FAULTS PERF_COUNT_SW_PAGE_FAULTS_MIN PERF_COUNT_SW_PAGE_FAULTS_MAJ PERF_COUNT_SW_ALIGNMENT_FAULTS PERF_COUNT_SW_EMULATION_FAULTS Signed-off-by: Deng-Cheng Zhu To: linux-mips@linux-mips.org Cc: a.p.zijlstra@chello.nl Cc: paulus@samba.org Cc: mingo@elte.hu Cc: acme@redhat.com Cc: jamie.iles@picochip.com Acked-by: David Daney Reviewed-by: Matt Fleming Patchwork: https://patchwork.linux-mips.org/patch/1686/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Apply CN63XXP1 errata workarounds.

2010-10-29T18:08:43Z

The CN63XXP1 needs a couple of workarounds to ensure memory is not written in unexpected ways. All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We pass a flag to the assembler to cover compiler generated code, and patch uasm for the dynamically generated code. The write buffer threshold is reduced to 4. Signed-off-by: David Daney Patchwork: http://patchwork.linux-mips.org/patch/1672/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Handle Octeon II caches.

2010-10-29T18:08:36Z

Signed-off-by: David Daney Patchwork: http://patchwork.linux-mips.org/patch/1664/ Signed-off-by: Ralf Baechle

MIPS: Convert DMA to use dma-mapping-common.h

2010-10-29T18:08:31Z

Use asm-generic/dma-mapping-common.h to handle all DMA mapping operations and establish a default get_dma_ops() that forwards all operations to the existing code. Augment dev_archdata to carry a pointer to the struct dma_map_ops, allowing DMA operations to be overridden on a per device basis. Currently this is never filled in, so the default dma_map_ops are used. A follow-on patch sets this for Octeon PCI devices. Also initialize the dma_debug system as it is now used if it is configured. Includes fixes by Kevin Cernekee . Signed-off-by: David Daney Patchwork: http://patchwork.linux-mips.org/patch/1637/ Patchwork: http://patchwork.linux-mips.org/patch/1678/ Signed-off-by: Ralf Baechle

MIPS: Remove wait argument of r4k_on_each_cpu

2010-10-29T18:08:25Z

All callers were passing in 1 anyway. Signed-off-by: Ralf Baechle

MIPS: More detailed description of r4k_on_each_cpu