kernel.git/arch/mips/mm/uasm.c, branch linux-3.2.y

MIPS: Use WARN() in uasm for better diagnostics.

2011-01-18T18:30:24Z

On the off chance that uasm ever warns about overflow, there is no way to know what the offending instruction is. Change the printks to WARNs, so we can get a nice stack trace. It has the added benefit of being much more noticeable than the short single line warning message, so is less likely to be ignored. Signed-off-by: David Daney To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1905/ Signed-off-by: Ralf Baechle

MIPS: Add LDX and LWX instructions to uasm.

2011-01-18T18:30:23Z

Needed by Octeon II optimized TLB handlers. Signed-off-by: David Daney To: linux-mips@linux-mips.org Pachwork: https://patchwork.linux-mips.org/patch/1903/ Signed-off-by: Ralf Baechle

MIPS: Add DINSM to uasm.

2011-01-18T18:30:22Z

Signed-off-by: David Daney To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1875/ Signed-off-by: Ralf Baechle

MIPS: Octeon: Apply CN63XXP1 errata workarounds.

2010-10-29T18:08:43Z

The CN63XXP1 needs a couple of workarounds to ensure memory is not written in unexpected ways. All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We pass a flag to the assembler to cover compiler generated code, and patch uasm for the dynamically generated code. The write buffer threshold is reduced to 4. Signed-off-by: David Daney Patchwork: http://patchwork.linux-mips.org/patch/1672/ Signed-off-by: Ralf Baechle

MIPS: uasm: Add option to export uasm API.

2010-08-05T12:26:21Z

A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported for use in modules. When it is exported, all the uasm data and code cease to be __init and __initdata. Also daddiu_bug cannot be __cpuinitdata if uasm is exported. The cleanest thing is to just make it normal data. Signed-off-by: David Daney To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1500/ Signed-off-by: Ralf Baechle

MIPS: uasm: Add BBIT0 and BBIT1 instructions

2010-08-05T12:26:21Z

These are OCTEON specific instructions. Signed-off-by: David Daney To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1496/ Signed-off-by: Ralf Baechle

MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.

2010-08-05T12:26:20Z

Signed-off-by: David Daney To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1495/ Signed-off-by: Ralf Baechle

MIPS: uasm: Add OR instruction.

2010-04-12T16:26:20Z

This is needed for the fix of the M3 workaround. Signed-off-by: Ralf Baechle

MIPS: Add SYSCALL to uasm.

2010-04-12T16:26:14Z

Signed-off-by: David Daney To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/976/ Signed-off-by: Ralf Baechle

MIPS: Add TLBR and ROTR to uasm.

2010-02-27T11:53:25Z

The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and ROTR support in uasm. We also add a UASM_i_ROTR macro. Signed-off-by: David Daney To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/953/ Signed-off-by: Ralf Baechle