kernel.git/arch/mips/kernel/smtc.c, branch linux-2.6.28.y

[MIPS] SMTC: Fix SMTC dyntick support.

2008-10-03T16:58:58Z

Rework of SMTC support to make it work with the new clock event system, allowing "tickless" operation, and to make it compatible with the use of the "wait_irqoff" idle loop. The new clocking scheme means that the previously optional IPI instant replay mechanism is now required, and has been made more robust. Signed-off-by: Kevin D. Kissell Signed-off-by: Ralf Baechle

[MIPS] SMTC: Close tiny holes in the SMTC IPI replay system.

2008-10-03T16:58:58Z

Signed-off-by: Kevin D. Kissell Signed-off-by: Ralf Baechle

[MIPS] Build fix: Fix irq flags type

2008-10-03T16:58:56Z

Though from a hardware perspective it would be sensible to use only a 32-bit unsigned int type Linux defines interrupt flags to be stored in an unsigned long and nothing else. Signed-off-by: Ralf Baechle

mips: convert to generic helpers for IPI function calls

2008-06-26T09:22:57Z

This converts mips to use the new helpers for smp_call_function() and friends, and adds support for smp_call_function_single(). Not tested, but it compiles. mips shares the same IPI for smp_call_function() and smp_call_function_single(), since not all mips platforms have enough available IPIs to support seperate setups. Cc: Ralf Baechle Signed-off-by: Jens Axboe

[MIPS] Add support for MIPS CMP platform.

2008-04-28T16:14:26Z

Signed-off-by: Chris Dearman Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle

[MIPS] Remove TLB sanitation code

2008-04-28T16:14:25Z

It is not being used by Malta and shouldn't be needed for MIPSsim. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle

arch/mips/: Spelling fixes

2008-02-03T14:54:53Z

Signed-off-by: Joe Perches Signed-off-by: Adrian Bunk

[MIPS] SMP: Call platform methods via ops structure.

2008-01-29T10:14:57Z

Signed-off-by: Ralf Baechle

[MIPS] SMTC: Allow control over TC assignment to vpe0.

2007-10-29T19:35:32Z

Modify the SMTC initialization code to allow boot-time specification not only of how many VPEs and TCs to use, but also how many TCs out of the allowed pool are to be bound to VPE 0. The new boot option is "vpe0tcs=N", where N is an integer. Using it in combination with the existing options allows arbitrary assignments across the 2 VPEs of a 34K. e.g. "maxtcs=3 vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4 vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1. If no vpe0tcs option is specified, the traditional algorithm of evenly dividing TCs between available VPEs, with the odd "slop" going to VPE0, is retained. The reason for doing this is to allow a finer balancing of TCs which can handle I/O interrupts on Malta (those on VPE 0) and those which cannot. Signed-off-by: Ralf Baechle

[MIPS] Kill num_online_cpus() loops.

2007-10-11T22:46:18Z

Signed-off-by: Ralf Baechle