kernel.git/arch/mips/kernel/smp-cps.c, branch linux-6.9.y

MIPS: Allows relocation exception vectors everywhere

2024-02-20T11:44:59Z

Now the exception vector for CPS systems are allocated on-fly with memblock as well. It will try to allocate from KSEG1 first, and then try to allocate in low 4G if possible. The main reset vector is now generated by uasm, to avoid tons of patches to the code. Other vectors are copied to the location later. move 64bits fix in an other patch fix cache issue with mips_cps_core_entry rewrite the patch to reduce the diff stat move extern in header use cache address for copying vector gc: use the new macro CKSEG[0A1]DDR_OR_64BIT() Signed-off-by: Jiaxun Yang Signed-off-by: Gregory CLEMENT Signed-off-by: Thomas Bogendoerfer

mips, kexec: fix the incorrect ifdeffery and dependency of CONFIG_KEXEC

2023-12-13T01:20:18Z

The select of KEXEC for CRASH_DUMP in kernel/Kconfig.kexec will be dropped, then compiling errors will be triggered if below config items are set: === CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_CRASH_DUMP=y === -------------------------------------------------------------------- mipsel-linux-ld: kernel/kexec_core.o: in function `kimage_free': kernel/kexec_core.c:(.text+0x2200): undefined reference to `machine_kexec_cleanup' mipsel-linux-ld: kernel/kexec_core.o: in function `__crash_kexec': kernel/kexec_core.c:(.text+0x2480): undefined reference to `machine_crash_shutdown' mipsel-linux-ld: kernel/kexec_core.c:(.text+0x2488): undefined reference to `machine_kexec' mipsel-linux-ld: kernel/kexec_core.o: in function `kernel_kexec': kernel/kexec_core.c:(.text+0x29b8): undefined reference to `machine_shutdown' mipsel-linux-ld: kernel/kexec_core.c:(.text+0x29c0): undefined reference to `machine_kexec' -------------------------------------------------------------------- Here, change the dependency of building kexec_core related object files, and the ifdeffery in mips from CONFIG_KEXEC to CONFIG_KEXEC_CORE. Link: https://lkml.kernel.org/r/20231208073036.7884-4-bhe@redhat.com Signed-off-by: Baoquan He Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202311302042.sn8cDPIX-lkp@intel.com/ Cc: Eric DeVolder Cc: Ignat Korchagin Cc: Stephen Rothwell Signed-off-by: Andrew Morton

Merge tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

2023-06-29T22:01:51Z

Pull MIPS updates from Thomas Bogendoerfer: - add support for TP-Link HC220 G5 v1 - add support for Wifi/Bluetooth on CI20 - rework Ralink clock and reset handling - cleanups and fixes * tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits) MIPS: Loongson64: DTS: Add RTC support to Loongson-2K1000 MIPS: Loongson64: DTS: Add RTC support to LS7A PCH MIPS: OCTEON: octeon-usb: cleanup divider calculation MIPS: OCTEON: octeon-usb: introduce dwc3_octeon_{read,write}q MIPS: OCTEON: octeon-usb: move gpio config to separate function MIPS: OCTEON: octeon-usb: use bitfields for shim register MIPS: OCTEON: octeon-usb: use bitfields for host config register MIPS: OCTEON: octeon-usb: use bitfields for control register MIPS: OCTEON: octeon-usb: add all register offsets mips: ralink: match all supported system controller compatible strings MIPS: dec: prom: Address -Warray-bounds warning MIPS: DTS: CI20: Raise VDDCORE voltage to 1.125 volts clk: ralink: mtmips: Fix uninitialized use of ret in mtmips_register_{fixed,factor}_clocks() mips: ralink: introduce commonly used remap node function mips: pci-mt7620: use dev_info() to log PCIe device detection result mips: pci-mt7620: do not print NFTS register value as error log MAINTAINERS: add Mediatek MTMIPS Clock maintainer mips: ralink: get cpu rate from new driver code mips: ralink: remove reset related code mips: ralink: mt7620: remove clock related code ...

MIPS: Mark core_vpe_count() as __init

2023-06-20T12:30:59Z

After commit 96cb8ae28c65 ("MIPS: Rework smt cmdline parameters"), modpost complains when building with clang: WARNING: modpost: vmlinux.o: section mismatch in reference: core_vpe_count (section: .text) -> smp_max_threads (section: .init.data) This warning occurs when core_vpe_count() is not inlined, as it appears that a non-init function is referring to an init symbol. However, this is not a problem in practice because core_vpe_count() is only called from __init functions, cps_smp_setup() and cps_prepare_cpus(). Resolve the warning by marking core_vpe_count() as __init, as it is only called in an init context so it can refer to init functions and symbols and have its memory freed on boot. Fixes: 96cb8ae28c65 ("MIPS: Rework smt cmdline parameters") Signed-off-by: Nathan Chancellor Reviewed-by: Nick Desaulniers Signed-off-by: Thomas Bogendoerfer

MIPS: Rework smt cmdline parameters

2023-06-09T08:34:14Z

Provide a generic smt parameters interface aligned with s390 to allow users to limit smt usage and threads per core. It replaced previous undocumented "nothreads" parameter for smp-cps which is ambiguous and does not cover smp-mt. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

MIPS: SMP_CPS: Switch to hotplug core state synchronization

2023-05-15T11:44:58Z

Switch to the CPU hotplug core state tracking and synchronization mechanim. This unfortunately requires to add dead reporting to the non CPS platforms as CPS is the only user, but it allows an overall consolidation of this functionality. No functional change intended. Signed-off-by: Thomas Gleixner Signed-off-by: Peter Zijlstra (Intel) Tested-by: Michael Kelley Tested-by: Oleksandr Natalenko Tested-by: Helge Deller # parisc Tested-by: Guilherme G. Piccoli # Steam Deck Link: https://lore.kernel.org/r/20230512205256.803238859@linutronix.de

Merge tag 'objtool-core-2023-04-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2023-04-28T21:02:54Z

Pull objtool updates from Ingo Molnar: - Mark arch_cpu_idle_dead() __noreturn, make all architectures & drivers that did this inconsistently follow this new, common convention, and fix all the fallout that objtool can now detect statically - Fix/improve the ORC unwinder becoming unreliable due to UNWIND_HINT_EMPTY ambiguity, split it into UNWIND_HINT_END_OF_STACK and UNWIND_HINT_UNDEFINED to resolve it - Fix noinstr violations in the KCSAN code and the lkdtm/stackleak code - Generate ORC data for __pfx code - Add more __noreturn annotations to various kernel startup/shutdown and panic functions - Misc improvements & fixes * tag 'objtool-core-2023-04-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits) x86/hyperv: Mark hv_ghcb_terminate() as noreturn scsi: message: fusion: Mark mpt_halt_firmware() __noreturn x86/cpu: Mark {hlt,resume}_play_dead() __noreturn btrfs: Mark btrfs_assertfail() __noreturn objtool: Include weak functions in global_noreturns check cpu: Mark nmi_panic_self_stop() __noreturn cpu: Mark panic_smp_self_stop() __noreturn arm64/cpu: Mark cpu_park_loop() and friends __noreturn x86/head: Mark *_start_kernel() __noreturn init: Mark start_kernel() __noreturn init: Mark [arch_call_]rest_init() __noreturn objtool: Generate ORC data for __pfx code x86/linkage: Fix padding for typed functions objtool: Separate prefix code from stack validation code objtool: Remove superfluous dead_end_function() check objtool: Add symbol iteration helpers objtool: Add WARN_INSN() scripts/objdump-func: Support multiple functions context_tracking: Fix KCSAN noinstr violation objtool: Add stackleak instrumentation to uaccess safe list ...

MIPS: smp-cps: Disable coherence setup for unsupported ISA

2023-04-05T07:45:08Z

We don't know how to do coherence setup on ISA before MIPS Release 1. As CPS support only servers simulation purpose on those cores, and simulators are always coherent, just disable initialization code and provide user a warning in case coherence is not setup properly. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer

mips/cpu: Expose play_dead()'s prototype definition

2023-03-08T16:44:19Z

Include to make sure play_dead() matches its prototype going forward. Acked-by: Florian Fainelli Reviewed-by: Philippe Mathieu-Daudé Link: https://lkml.kernel.org/r/20230216184249.ogaqsaykottpxtcb@treble Signed-off-by: Josh Poimboeuf

MIPS: smp-cps: Don't rely on CP0_CMGCRBASE

2023-02-27T22:44:57Z

CP0_CMGCRBASE is not always available on CPS enabled system such as early proAptiv. For early SMP bring up where we can't safely access memeory, we patch the entry of CPS NMI vector to inject CMGCR address directly into register during early core bringup. For VPE bringup as the core is already coherenct at that point we just read the variable to obtain the address. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer