kernel.git/arch/mips/kernel/smp-cps.c, branch linux-5.13.y

MIPS: No need to check CPU 0 in cps_cpu_disable()

2020-12-28T21:34:09Z

After commit 9cce844abf07 ("MIPS: CPU#0 is not hotpluggable"), c->hotpluggable is 0 for CPU 0 and it will not generate a control file in sysfs for this CPU: [root@linux loongson]# cat /sys/devices/system/cpu/cpu0/online cat: /sys/devices/system/cpu/cpu0/online: No such file or directory [root@linux loongson]# echo 0 > /sys/devices/system/cpu/cpu0/online bash: /sys/devices/system/cpu/cpu0/online: Permission denied So no need to check CPU 0 in cps_cpu_disable(), just remove it. Reported-by: liwei (GF) Signed-off-by: Tiezhu Yang Signed-off-by: Thomas Bogendoerfer

MIPS: SMP-CPS: Add support for irq migration when CPU offline

2020-12-04T12:01:47Z

Currently we won't migrate irqs when offline CPUs, which has been implemented on most architectures. That will lead to some devices work incorrectly if the bound cores are offline. While that can be easily supported by enabling GENERIC_IRQ_MIGRATION. But i don't pretty known the reason it was not supported on all MIPS platforms. This patch add the support for irq migration on MIPS CPS platform, and it's tested on the interAptiv processor. Signed-off-by: Wei Li Signed-off-by: Thomas Bogendoerfer

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

MIPS: kexec: CPS systems to halt nonboot CPUs

2018-09-22T17:32:33Z

Share code between play_dead() and cps_kexec_nonboot_cpu(). Register the latter to mp_ops for kexec. Signed-off-by: Dengcheng Zhu Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/20567/ Cc: pburton@wavecomp.com Cc: ralf@linux-mips.org Cc: linux-mips@linux-mips.org Cc: rachel.mozes@intel.com

MIPS: SMP-CPS: Remove duplicate assignment of core in play_dead

2018-02-05T14:36:06Z

The merge of commit f875a832d2028 ("MIPS: Abstract CPU core & VP(E) ID access through accessor functions") ended up creating a duplicate assignment of core during the rebase on commit bac06cf0fb9d ("MIPS: smp-cps: Fix potentially uninitialised value of core"). Remove the duplicate. Fixes: f875a832d202 ("MIPS: Abstract CPU core & VP(E) ID access through accessor functions") Signed-off-by: Matt Redfearn Cc: Ralf Baechle Cc: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17955/ Signed-off-by: James Hogan

MIPS: CPS: Fix use of current_cpu_data in preemptible code

2017-11-01T21:05:57Z

Commit 1ec9dd80bedc ("MIPS: CPS: Detect CPUs in secondary clusters") added a check in cps_boot_secondary() that the secondary being booted is in the same cluster as the CPU running this code. This check is performed using current_cpu_data without disabling preemption. As such when CONFIG_PREEMPT=y, a BUG is triggered: [ 57.991693] BUG: using smp_processor_id() in preemptible [00000000] code: hotplug/1749 [ 58.063077] Call Trace: [ 58.065842] [<8040cdb4>] show_stack+0x84/0x114 [ 58.070830] [<80b11b38>] dump_stack+0xf8/0x140 [ 58.075796] [<8079b12c>] check_preemption_disabled+0xec/0x118 [ 58.082204] [<80415110>] cps_boot_secondary+0x84/0x44c [ 58.087935] [<80413a14>] __cpu_up+0x34/0x98 [ 58.092624] [<80434240>] bringup_cpu+0x38/0x114 [ 58.097680] [<80434af0>] cpuhp_invoke_callback+0x168/0x8f0 [ 58.103801] [<804362d0>] _cpu_up+0x154/0x1c8 [ 58.108565] [<804363dc>] do_cpu_up+0x98/0xa8 [ 58.113333] [<808261f8>] device_online+0x84/0xc0 [ 58.118481] [<80826294>] online_store+0x60/0x98 [ 58.123562] [<8062261c>] kernfs_fop_write+0x158/0x1d4 [ 58.129196] [<805a2ae4>] __vfs_write+0x4c/0x168 [ 58.134247] [<805a2dc8>] vfs_write+0xe0/0x190 [ 58.139095] [<805a2fe0>] SyS_write+0x68/0xc4 [ 58.143854] [<80415d58>] syscall_common+0x34/0x58 In reality we don't currently support running the kernel on CPUs not in cluster 0, so the answer to cpu_cluster(¤t_cpu_data) will always be 0, even if this task being preempted and continues running on a different CPU. Regardless, the BUG should not be triggered, so fix this by switching to raw_current_cpu_data. When multicluster support lands upstream this check will need removing or changing anyway. Fixes: 1ec9dd80bedc ("MIPS: CPS: Detect CPUs in secondary clusters") Signed-off-by: Matt Redfearn Reviewed-by: Paul Burton CC: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17563/ Signed-off-by: James Hogan

Update MIPS email addresses

2017-10-31T22:42:39Z

MIPS will soon not be a part of Imagination Technologies, and as such many @imgtec.com email addresses will no longer be valid. This patch updates the addresses for those who: - Have 10 or more patches in mainline authored using an @imgtec.com email address, or any patches dated within the past year. - Are still with Imagination but leaving as part of the MIPS business unit, as determined from an internal email address list. - Haven't already updated their email address (ie. JamesH) or expressed a desire to be excluded (ie. Maciej). - Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt & myself. New addresses are of the form firstname.lastname@mips.com, and all verified against an internal email address list. An entry is added to .mailmap for each person such that get_maintainer.pl will report the new addresses rather than @imgtec.com addresses which will soon be dead. Instances of the affected addresses throughout the tree are then mechanically replaced with the new @mips.com address. Signed-off-by: Paul Burton Cc: Deng-Cheng Zhu Cc: Deng-Cheng Zhu Acked-by: Dengcheng Zhu Cc: Matt Redfearn Cc: Matt Redfearn Acked-by: Matt Redfearn Cc: Andrew Morton Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17540/ Signed-off-by: James Hogan

MIPS: Remove unnecessary inclusions of linux/irqchip/mips-gic.h

2017-09-04T11:53:14Z

linux/irqchip/mips-gic.h is included in a few files that don't actually use it at all. Remove these unnecessary inclusions in preparation for removing the header. Signed-off-by: Paul Burton Cc: Jason Cooper Cc: Marc Zyngier Cc: Thomas Gleixner Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17048/ Signed-off-by: Ralf Baechle

MIPS: CPS: Read GIC_VL_IDENT directly, not via irqchip driver

2017-09-04T11:53:14Z

Rather than calling the gic_read_local_vp_id() function from the GIC irqchip driver, call read_gic_vl_ident() to read the GIC_VL_IDENT register directly. This will allow us to remove gic_read_local_vp_id() from the irqchip driver in a further patch, since that driver doesn't actually care about the register's value. Signed-off-by: Paul Burton Cc: Jason Cooper Cc: Marc Zyngier Cc: Thomas Gleixner Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17023/ Signed-off-by: Ralf Baechle

MIPS: CPS: Detect CPUs in secondary clusters

2017-08-29T22:57:28Z

As a first step towards supporting multi-cluster systems, detect cores & VPs in secondary clusters & record their cluster information in the cpu_data array. The "VP topology" line printed during boot is extended to display multiple clusters. On a single cluster it shows output like the following: VP topology: {4,4} This would indicate a system with 2 cores which each contain 4 VPs. We extend this to cover multiple clusters in a natural way: VP topology: {4,4},{2,2} This would indicate a system with 2 clusters. The first cluster contains 2 cores which each contain 4 VPs. The second cluster contains 2 cores which each contain 2 VPs. Actually booting these cores & VPs is left to further patches once other pieces are in place. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17017/ Signed-off-by: Ralf Baechle