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<title>kernel.git/arch/mips/include/asm/netlogic, branch linux-3.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.15.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.15.y'/>
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<updated>2014-01-24T21:39:50Z</updated>
<entry>
<title>MIPS: Netlogic: Remove XLR early serial setup</title>
<updated>2014-01-24T21:39:50Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-10-25T11:24:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=194d315da86af504559a8a21026360097575bd55'/>
<id>urn:sha1:194d315da86af504559a8a21026360097575bd55</id>
<content type='text'>
The early serial code is not needed because we already have early
printk support provided by common/earlycons.c

This change also fixes the following build error that occurs when
CONFIG_SERIAL_8250 is not configured for Netlogic XLR boards:

arch/mips/built-in.o: In function `nlm_early_serial_setup':
setup.c:(.init.text+0x274): undefined reference to `early_serial_setup'
make: *** [vmlinux] Error 1

Reported-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6083/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: XLP9XX USB support</title>
<updated>2014-01-24T21:39:49Z</updated>
<author>
<name>Ganesan Ramalingam</name>
</author>
<published>2013-12-21T11:22:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3262b21ef8523175f0758f4deccec048e73d5b18'/>
<id>urn:sha1:3262b21ef8523175f0758f4deccec048e73d5b18</id>
<content type='text'>
XLP9XX has a USB 3.0 controller on-chip with 2 xHCI ports. The USB
block is similar to the one on XLP2XX, so update usb-init-xlp2.c
to handle XLP9XX as well.

Signed-off-by: Ganesan Ramalingam &lt;ganesanr@broadcom.com&gt;
Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6285/
</content>
</entry>
<entry>
<title>MIPS: PCI: Netlogic XLP9XX support</title>
<updated>2014-01-24T21:39:49Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b6ba1c5294c3f51fd4cf8b0d60de4ba82ef2a1c9'/>
<id>urn:sha1:b6ba1c5294c3f51fd4cf8b0d60de4ba82ef2a1c9</id>
<content type='text'>
Add PCI support for Netlogic XLP9XX. The PCI registers and
SoC bus numbers have changed in XLP9XX.

Also skip a few (bus,dev,fn) combinations which have issues when
read.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6284/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: Add cpu to node mapping for XLP9XX</title>
<updated>2014-01-24T21:39:49Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:26Z</published>
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<id>urn:sha1:98d4884ca55883e8b16180bd969a8bccaa885c80</id>
<content type='text'>
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX.
Update code that calculates node id from cpu id to handle this.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6283/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: XLP9XX bridge and DRAM code</title>
<updated>2014-01-24T21:39:49Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e7aa6c66b0acc34caba3af485f1a039bfa8aef07'/>
<id>urn:sha1:e7aa6c66b0acc34caba3af485f1a039bfa8aef07</id>
<content type='text'>
Update bridge code. Add code to the XLP9XX registers for DRAM
size, limit and node when running on XLPXX

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6282/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: XLP9XX UART offset</title>
<updated>2014-01-24T21:39:48Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=61673de131f9bf1bace63a5e58ab683a0e5313fd'/>
<id>urn:sha1:61673de131f9bf1bace63a5e58ab683a0e5313fd</id>
<content type='text'>
Update IO offset of the early console UART.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6281/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: SYS block updates of XLP9XX</title>
<updated>2014-01-24T21:39:48Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=861c056953dc4354414881a5e1d382297ef4ea53'/>
<id>urn:sha1:861c056953dc4354414881a5e1d382297ef4ea53</id>
<content type='text'>
Add the SYS block registers for XLP9XX, most of them have changed.
The wakeup sequence has been updated to set the coherent mode from
the main thread rather than the woken up thread.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6280/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: XLP9XX PIC updates</title>
<updated>2014-01-24T21:39:48Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d150cef4e8cc723d90226e503ef6aff2ca9fc57c'/>
<id>urn:sha1:d150cef4e8cc723d90226e503ef6aff2ca9fc57c</id>
<content type='text'>
Functions for the XLP9XX interrupt table entry format and other PIC
register changes.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6279/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: update iomap.h for XLP9XX</title>
<updated>2014-01-24T21:39:48Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5513c760db4f3a914247b8fff1ba74b9ebb0af8e'/>
<id>urn:sha1:5513c760db4f3a914247b8fff1ba74b9ebb0af8e</id>
<content type='text'>
Most IO block offsets have changed in XLP9XX. Update iomap.h to add the
new addresses of different SoC blocks like PIC, SYS, UART etc. that are
needed by the base code.

On XLP9xx, the SoC blocks of other nodes are seen on a PCI bus
corresponding to the node. Update iomap code to reflect this.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6277/
</content>
</entry>
<entry>
<title>MIPS: Netlogic: Identify XLP 9XX chip</title>
<updated>2014-01-24T21:39:48Z</updated>
<author>
<name>Jayachandran C</name>
</author>
<published>2013-12-21T11:22:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8907c55e725087633fde1dc0aa942d871451e6a7'/>
<id>urn:sha1:8907c55e725087633fde1dc0aa942d871451e6a7</id>
<content type='text'>
Adds processor ID of XLP 9XX to asm/cpu.h.  Update netlogic/xlp-hal/xlp.h
to add cpu_is_xlp9xx() and to update cpu_is_xlpii() to support XLP 9XX.

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6274/
</content>
</entry>
</feed>
