kernel.git/arch/mips/include/asm/cpu-features.h, branch linux-2.6.30.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.30.y2009-05-14T12:50:26ZMIPS: Enable CLO / CLZ instructions via separate CPU property2009-05-14T12:50:26ZRalf Baechle2009-04-19T01:21:22Zurn:sha1:47740eb887796608fb4c629aa6b8507a2fb6c0eb
This is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do
not implement the full MIPS32 / MIPS64 architecture.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Hook Cavium OCTEON cache init into cache.c2009-01-11T09:57:22ZDavid Daney2008-12-11T23:33:27Zurn:sha1:47d979eca33f8df49bfead2d5efa23a70b413882
Follow precedent of other boards, and hook-up the CPU specific cache
init.
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: New feature test macro cpu_has_mips_r2008-10-30T14:44:33ZRalf Baechle2008-10-28T09:37:47Zurn:sha1:c46b302b948e2070cb713171207c42e9586f131a
cpu_has_mips_r is true if a processor is MIPS32 or MIPS64, any architecture
revision.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS: Move headfiles to new location below arch/mips/include2008-10-11T15:18:52ZRalf Baechle2008-09-16T17:48:51Zurn:sha1:384740dc49ea651ba350704d13ff6be9976e37fe
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>