<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/mips/boot/dts, branch linux-6.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.15.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.15.y'/>
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<updated>2025-06-19T13:40:30Z</updated>
<entry>
<title>MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a</title>
<updated>2025-06-19T13:40:30Z</updated>
<author>
<name>WangYuli</name>
</author>
<published>2025-04-16T03:45:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=30aea6b925ec8995094c8dd7e1e3d8d0234f3cfe'/>
<id>urn:sha1:30aea6b925ec8995094c8dd7e1e3d8d0234f3cfe</id>
<content type='text'>
[ Upstream commit 6d223b8ffcd1593d032b71875def2daa71c53111 ]

Similar to commit 98a9e2ac3755 ("MIPS: Loongson64: DTS: Fix msi node for ls7a").

Fix follow warnings:
  arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dts:28.31-36.4: Warning (interrupt_provider): /bus@10000000/msi-controller@2ff00000: Missing '#interrupt-cells' in interrupt provider
  arch/mips/boot/dts/loongson/loongson64c_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider'

Fixes: 24af105962c8 ("MIPS: Loongson64: DeviceTree for LS7A PCH")
Tested-by: WangYuli &lt;wangyuli@uniontech.com&gt;
Signed-off-by: WangYuli &lt;wangyuli@uniontech.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>mips: dts: ralink: mt7628a: update system controller node and its consumers</title>
<updated>2025-02-27T09:38:26Z</updated>
<author>
<name>Sergio Paracuellos</name>
</author>
<published>2025-02-24T05:34:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=232085d118ff4695c0e9992ebc7ba4da7a24875e'/>
<id>urn:sha1:232085d118ff4695c0e9992ebc7ba4da7a24875e</id>
<content type='text'>
Current MT7628A device tree file system controller node is wrong since it is
not matching bindings. Hence, update it to match current bindings updating
it also to use new introduced clock constants.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: ralink: mt7620a: update system controller node and its consumers</title>
<updated>2025-02-21T17:06:53Z</updated>
<author>
<name>Sergio Paracuellos</name>
</author>
<published>2025-01-20T09:21:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e64d19ed82fd448842d2a6834f62cde51c901fa2'/>
<id>urn:sha1:e64d19ed82fd448842d2a6834f62cde51c901fa2</id>
<content type='text'>
Current MT7620A device tree file system controller node is wrong since it is
not matching bindings. Hence, update it to match current bindings updating
it also to use new introduced clock constants.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: ralink: rt3883: update system controller node and its consumers</title>
<updated>2025-02-21T17:05:03Z</updated>
<author>
<name>Sergio Paracuellos</name>
</author>
<published>2025-01-20T09:21:44Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c51e958ddc37cc3f040cb56f4ab605cd8c9fa508'/>
<id>urn:sha1:c51e958ddc37cc3f040cb56f4ab605cd8c9fa508</id>
<content type='text'>
Current RT3883 device tree file system controller node is wrong since it is
not matching bindings. Hence, update it to match current bindings updating
it also to use new introduced clock constants.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: ralink: rt3050: update system controller node and its consumers</title>
<updated>2025-02-21T17:04:31Z</updated>
<author>
<name>Sergio Paracuellos</name>
</author>
<published>2025-01-20T09:21:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=acf13fc60cfa0824cafd7ce9ab0784ffc87a5d86'/>
<id>urn:sha1:acf13fc60cfa0824cafd7ce9ab0784ffc87a5d86</id>
<content type='text'>
Current RT3050 device tree file system controller node is wrong since it is
not matching bindings. Hence, update it to match current bindings updating
it also to use new introduced clock constants.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: ralink: rt2880: update system controller node and its consumers</title>
<updated>2025-02-21T17:03:59Z</updated>
<author>
<name>Sergio Paracuellos</name>
</author>
<published>2025-01-20T09:21:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c8292b002d2adf10fd47ae7dec9d610d8abe3c53'/>
<id>urn:sha1:c8292b002d2adf10fd47ae7dec9d610d8abe3c53</id>
<content type='text'>
Current RT2880 device tree file system controller node is wrong since it is
not matching bindings. Hence, update it to match current bindings updating
it also to use new introduced clock constants.

Signed-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: realtek: Add restart to Cisco SG220-26P</title>
<updated>2025-02-21T14:10:26Z</updated>
<author>
<name>Sander Vanheule</name>
</author>
<published>2025-01-19T18:34:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5ae16e22b0a04123dc95e0ce9b251fd953bdd0c6'/>
<id>urn:sha1:5ae16e22b0a04123dc95e0ce9b251fd953bdd0c6</id>
<content type='text'>
Define a gpio-restart node to the Cisco SG220-26P so the device can be
rebooted using the SoC's hard reset pin. Set the priority to 192 so the
gpio-restart method takes priority over the watchdog restart.

Signed-off-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: realtek: Add RTL838x SoC peripherals</title>
<updated>2025-02-21T14:10:22Z</updated>
<author>
<name>Sander Vanheule</name>
</author>
<published>2025-01-19T18:34:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b3992b82ad9e288d773f8bb604299ffc546811b7'/>
<id>urn:sha1:b3992b82ad9e288d773f8bb604299ffc546811b7</id>
<content type='text'>
Add some of the SoC's CPU peripherals currently supported:
  - GPIO controller with support for 24 GPIO lines, although not all
    lines are brought out to pads on the SoC package. These lines can
    generate interrupts from external sources.
  - Watchdog which can be used to restart the SoC if no external restart
    logic is present.
  - SPI controller, primarily used to access NOR flash

Signed-off-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: realtek: Replace uart clock property</title>
<updated>2025-02-21T14:10:17Z</updated>
<author>
<name>Sander Vanheule</name>
</author>
<published>2025-01-19T18:34:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4b7785dd43b8eeae3534da4a13922a361eace8ff'/>
<id>urn:sha1:4b7785dd43b8eeae3534da4a13922a361eace8ff</id>
<content type='text'>
Add a fixed clock to define the clock frequency of the Lexra bus and use
this for the two uart nodes instead of a separate clock-frequency
property.

Signed-off-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>mips: dts: realtek: Correct uart interrupt-parent</title>
<updated>2025-02-21T14:10:15Z</updated>
<author>
<name>Sander Vanheule</name>
</author>
<published>2025-01-19T18:34:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=31e96a0a98978da7b7561ba5eeeef751ffe840d4'/>
<id>urn:sha1:31e96a0a98978da7b7561ba5eeeef751ffe840d4</id>
<content type='text'>
The uart interrupts on RTL838x chips do not lead to the CPU's interrupt
controller directly, but passes via the SoC interrupt controller. Update
the interrupt-parent property to fix this.

Signed-off-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
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