kernel.git/arch/mips/ath79/clock.c, branch linux-4.1.y

MIPS: ath79: Switch to the clkdev framework

2013-09-03T21:22:18Z

The ath79 code uses static clock devices and provides its own clk_{get,put} implementations. Change the code to use dynamically allocated clock devices and register the clocks within the clkdev framework. Additionally, remove the local clk_{get,put} implementation. The clkdev framework has a common implementation of those. Also move the call of ath79_clock_init() from plat_mem_init() to plat_time_init(). Otherwise it would not be possible to use memory allocation functions from ath79clock_init() becasuse the memory subsystem is not yet initialized when plat_mem_init() runs. Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5780/ Signed-off-by: Ralf Baechle

MIPS: ath79: Use local variables for clock rates

2013-09-03T21:22:18Z

Use local variables for ref, cpu, ddr and ahb rates in SoC specific clock init functions. The patch has no functional changes, it is an interim change in preparation of the next patch. Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5781/ Signed-off-by: Ralf Baechle

MIPS: ath79: Use ath79_get_sys_clk_rate to get basic clock rates

2013-09-03T21:22:17Z

Instead of accessing the rate field of the static clock devices directly, use the recently introduced helper function to get the rate of the basic clocks. The static ath79_{ahb,cpu,ddr,ref}_clk variables will be removed by a subsequent patch. The actual change is in preparation of that. Also move the clock frequency printing code into the plat_time_init function. We are getting the cpu clock rate there already so we can save an extra call of the helper. Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5782/ Signed-off-by: Ralf Baechle

MIPS: ath79: Use a helper function to get system clock rates

2013-09-03T21:22:17Z

The ath79 platform uses similar code to get the rate of various clocks during init. Separate the similar code into a new helper function and use that to avoid code duplication. Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5778/ Signed-off-by: Ralf Baechle

MIPS: ath79: Use local ref clock rate in ar934x_get_pll_freq

2013-09-03T21:22:17Z

The reference clock rate is passed in the first argument of the function. Use that instead of the rate of the global ath79_ref_clk variable. Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5779/ Signed-off-by: Ralf Baechle

MIPS: ath79: Fix ar933x watchdog clock

2013-09-03T21:22:16Z

The watchdog device on the AR933x is connected to the AHB clock, however the current code uses the reference clock. Due to the wrong rate, the watchdog driver can't calculate correct register values for a given timeout value and the watchdog unexpectedly restarts the system. The code uses the wrong value since the initial commit 04225e1d227c8e68d685936ecf42ac175fec0e54 (MIPS: ath79: add AR933X specific clock init) The patch fixes the code to use the correct clock rate to avoid the problem. Cc: stable@vger.kernel.org Signed-off-by: Felix Fietkau Signed-off-by: Gabor Juhos Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5777/ Signed-off-by: Ralf Baechle

Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next

2013-02-21T11:51:33Z

MIPS: ath79: add clock setup code for the QCA955X SoCs

2013-02-19T08:36:25Z

The patch adds code to get various clock frequencies from the PLLs used in the QCA955x SoCs. Cc: Rodriguez, Luis Cc: Giori, Kathy Cc: QCA Linux Team Signed-off-by: Gabor Juhos Patchwork: http://patchwork.linux-mips.org/patch/4945/ Signed-off-by: John Crispin

MIPS: Whitespace cleanup.

2013-02-01T09:00:22Z

Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle

MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs

2012-10-01T09:37:15Z

Besides the CPU and DDR PLLs, the CPU and DDR frequencies can be derived from other PLLs in the SRIF block on the AR934x SoCs. The current code does not checks if the SRIF PLLs are used and this can lead to incorrectly calculated CPU/DDR frequencies. Fix it by calculating the frequencies from SRIF PLLs if those are used on a given board. Signed-off-by: Gabor Juhos Cc: Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4324/ Signed-off-by: Ralf Baechle