<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/mips/alchemy, branch linux-3.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.17.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2014-08-19T11:30:47Z</updated>
<entry>
<title>MIPS: Alchemy: Fix db1200 PSC clock enablement</title>
<updated>2014-08-19T11:30:47Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-08-18T15:10:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=293076f300f52e1593b596b3f09ec057ee6e4a36'/>
<id>urn:sha1:293076f300f52e1593b596b3f09ec057ee6e4a36</id>
<content type='text'>
Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone.  This patch
restores functionality to both Audio and I2C/SPI.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7544/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: remove old clock support</title>
<updated>2014-07-30T12:12:00Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=72e1e2a30f67fc19a958be6c1818e7e6cb1573fe'/>
<id>urn:sha1:72e1e2a30f67fc19a958be6c1818e7e6cb1573fe</id>
<content type='text'>
With the clock framework in place, remove unused functions and bits,
and drop the CLK_IGNORE_UNUSED flag, which is now unneeded.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7473/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: au1100fb: use clk framework</title>
<updated>2014-07-30T12:10:39Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6b1889c14b4606b7a1d0e08d52664b704bbfe65f'/>
<id>urn:sha1:6b1889c14b4606b7a1d0e08d52664b704bbfe65f</id>
<content type='text'>
Use the clock framework to en/disable the clock to the au1100
framebuffer device.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7474/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: db1x00: use clk framework</title>
<updated>2014-07-30T12:10:00Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=415e0fec7a388dbe224057c1134737e23710aa9b'/>
<id>urn:sha1:415e0fec7a388dbe224057c1134737e23710aa9b</id>
<content type='text'>
Make use of the clk framework to set up and enable all PSC clocks.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7469/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: usb: use clk framework</title>
<updated>2014-07-30T12:09:21Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3feae78416ae2c30f12c0a4bbe2e5dddf029510d'/>
<id>urn:sha1:3feae78416ae2c30f12c0a4bbe2e5dddf029510d</id>
<content type='text'>
Add use of the common clock framework to set and enable the 48MHz
clock source for the onchip OHCI and UDC blocks.

Tested on a DB1500.  (Au1200 and Au1300 use an external 48MHz crystal).

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7467/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: platform: use clk framework for uarts</title>
<updated>2014-07-30T12:09:02Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5a2fb71e7329dbcefbd08db8e44055c72ed52e90'/>
<id>urn:sha1:5a2fb71e7329dbcefbd08db8e44055c72ed52e90</id>
<content type='text'>
Use the clock framework to get the rate of the peripheral clock.
Remove the now obsolete get_uart_baud_base function.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7468/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: clock framework integration of onchip clocks</title>
<updated>2014-07-30T12:08:42Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=474402291a0ad4778a4e5fdff6ae507b2a26d809'/>
<id>urn:sha1:474402291a0ad4778a4e5fdff6ae507b2a26d809</id>
<content type='text'>
This patch introduces common clock framework integration for all
configurable on-chip clocks on Alchemy chips:

- 2 or 3 PLLs which generate integer multiples of the root rate 12MHz,
- 6 dividers which take one of the 3 PLLs as input and divide their
  rate by either multiples of 2 or 1 (Au1300).
- another bank of up to 6 muxes which take either one of the 6
  above dividers or one of the PLLs directly and divide their rate
  further by 1, 2, 3 or 4.
- a few other sources which are used by onchip peripherals and are
  informational.

This implementation will take the clock tree as it was set up
by boot firmware: all in-kernel boards should continue to work
without having to set up the clock tree in board code.

CLK_IGNORE_DISABLED will be removed once all drivers have been
converted.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7466/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: remove au_read/write/sync</title>
<updated>2014-07-30T11:56:34Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2f73bfbe0873452f4cd388ec2f67f8226fe93f79'/>
<id>urn:sha1:2f73bfbe0873452f4cd388ec2f67f8226fe93f79</id>
<content type='text'>
replace au_read/write/sync with __raw_read/write and wmb.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7465/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: add helpers to access static memory ctrl registers.</title>
<updated>2014-07-30T11:53:52Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9cf12167e909a86fbc4b39cf4cffef4cba40f1b3'/>
<id>urn:sha1:9cf12167e909a86fbc4b39cf4cffef4cba40f1b3</id>
<content type='text'>
This patch changes the static memory controller registers to offsets
from base, prefixes them with AU1000_ to avoid silent failures due to
changed addresses and introduces helpers to access them.

No functional changes, comparing assembly of a few select functions shows
no differences.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7463/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: introduce helpers to access SYS register block.</title>
<updated>2014-07-30T11:53:28Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-07-23T14:36:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8'/>
<id>urn:sha1:1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8</id>
<content type='text'>
This patch changes all absolute SYS_XY registers to offsets from the
SYS block base, prefixes them with AU1000 to avoid silent failures due
to changed addresses, and introduces helper functions to read/write
them.

No functional changes, comparing assembly of a few select functions shows
no differences.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7464/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
