<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/mips/alchemy, branch linux-2.6.34.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.34.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.34.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2011-06-26T16:47:01Z</updated>
<entry>
<title>MIPS: MTX-1: Make au1000_eth probe all PHY addresses</title>
<updated>2011-06-26T16:47:01Z</updated>
<author>
<name>Florian Fainelli</name>
</author>
<published>2011-02-27T18:53:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a1cc1e7db2a38908e0e1f14ae7ba6d430bdbba47'/>
<id>urn:sha1:a1cc1e7db2a38908e0e1f14ae7ba6d430bdbba47</id>
<content type='text'>
commit bf3a1eb85967dcbaae42f4fcb53c2392cec32677 upstream.

When au1000_eth probes the MII bus for PHY address, if we do not set
au1000_eth platform data's phy_search_highest_address, the MII probing
logic will exit early and will assume a valid PHY is found at address 0.
For MTX-1, the PHY is at address 31, and without this patch, the link
detection/speed/duplex would not work correctly.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2111/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
</entry>
<entry>
<title>MIPS: MTX-1: Fix PCI on the MeshCube and related boards</title>
<updated>2010-08-02T17:30:22Z</updated>
<author>
<name>Bruno Randolf</name>
</author>
<published>2010-07-11T15:40:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=01b9cd5d1870fb45aa398124366fe872255b523c'/>
<id>urn:sha1:01b9cd5d1870fb45aa398124366fe872255b523c</id>
<content type='text'>
commit 98a0f86a54bb195c28ae1ccb5a5f5cda12cf7121 upstream.

This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1:
Use linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke
PCI bus operation. The problem is caused by alchemy_gpio2_enable() which
resets the GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected
to GPIO2 and they obviously do not to like the reset. Since GPIO2 is
correctly initialized by the boot monitor (YAMON) it is not necessary to
call this function, so just remove it.

Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid
problems in case gpiolib gets initialized after PCI. And since alchemy
gpio_set_value() calls au_sync() we don't have to au_sync() again later.

Signed-off-by: Bruno Randolf &lt;br1@einfach.org&gt;
To: linux-mips@linux-mips.org
To: manuel.lauss@googlemail.com
Patchwork: https://patchwork.linux-mips.org/patch/1448/
Tested-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>MIPS: DB1200: PCMCIA card detection must not be auto-enabled.</title>
<updated>2010-04-30T19:52:43Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2010-04-21T15:41:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0000a5390184af1459e82506fcfa7db96f3e6d33'/>
<id>urn:sha1:0000a5390184af1459e82506fcfa7db96f3e6d33</id>
<content type='text'>
Same issues as SD card detection:  One of both is always triggering and the
handlers take care to shut it up and enable the other.  To avoid messages
about "unbalanced interrupt enable/disable" they must not be automatically
enabled when initally requested.

This was not an issue with the db1200_defconfig due to fortunate timings;
on a build without network chip support the warnings appear.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1133/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: DB1200: Remove custom wait implementation</title>
<updated>2010-04-12T16:26:22Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2010-04-03T15:07:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d8000beef2cd10c16dc5f66af715f692f5992652'/>
<id>urn:sha1:d8000beef2cd10c16dc5f66af715f692f5992652</id>
<content type='text'>
While playing with the out-of-tree MAE driver module, the system would
panic after a while in the db1200 custom wait code after wakeup due to
a clobbered k0 register being used as target address of a store op.

Remove the custom wait implementation and revert back to the Alchemy-
recommended implementation already set as default.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1092/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Fix Au1100 ethernet build failure</title>
<updated>2010-02-27T11:53:45Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2010-02-26T16:22:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=acc4d245a70615755cab8bace7f0f87870fc99d9'/>
<id>urn:sha1:acc4d245a70615755cab8bace7f0f87870fc99d9</id>
<content type='text'>
Don't define platform info for second mac on au1100 (which only has a
single mac).

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1004/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Repair db1500/bosporus builds</title>
<updated>2010-02-27T11:53:45Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2010-02-26T16:22:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=570cb456efbd1f1e761869881ae72177595de356'/>
<id>urn:sha1:570cb456efbd1f1e761869881ae72177595de356</id>
<content type='text'>
A few hunks somehow ended up outside their #ifdef/endif blocks,
leading to -Werror-induces build failures.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1003/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: use 36bit addresses for PCMCIA resources.</title>
<updated>2010-02-27T11:53:43Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2010-02-24T16:40:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=11b897cf84c37e6522db914793677e933ef311fb'/>
<id>urn:sha1:11b897cf84c37e6522db914793677e933ef311fb</id>
<content type='text'>
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus
area.  Currently, addresses at the far end of the 32bit area are assumed
to belong to the PCMCIA area and fixed up to the real 36bit address before
being passed to ioremap().

A previous commit enabled 64 bit physical size for the resource datatype on
Alchemy and this allows to use the correct 36bit addresses when registering
the PCMCIA sockets.

This patch removes the 32-to-36bit address fixup and registers the Alchemy
demo board pcmcia socket with the correct 36bit physical addresses.

Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet
card.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Cc: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/994/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: devboard PM needs to save CPLD registers.</title>
<updated>2010-02-27T11:53:41Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2010-02-23T17:57:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e275ed5ee94b358964a0dae1c8b49f0bff260b60'/>
<id>urn:sha1:e275ed5ee94b358964a0dae1c8b49f0bff260b60</id>
<content type='text'>
Save/restore CPLD registers when doing suspend-to-ram; this fixes issues
with harddisk and ethernet not working correctly when resuming on DB1200.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
To: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/986/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Simplify DMA channel allocation code.</title>
<updated>2010-02-27T11:53:37Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2010-02-27T11:53:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=da4afffc1d03c4f0334dabd28ce4c2325ee8f092'/>
<id>urn:sha1:da4afffc1d03c4f0334dabd28ce4c2325ee8f092</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Manuel Lauss &lt;manuel.lauss@googlemail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Remove time_lock.</title>
<updated>2010-02-27T11:53:36Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2010-02-27T11:53:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1a73f0478a289ee5bb2e4f44a6ecf1d6d6410eab'/>
<id>urn:sha1:1a73f0478a289ee5bb2e4f44a6ecf1d6d6410eab</id>
<content type='text'>
The sole user is au1xxx_calc_clock() which is only used in early bootup
where the is no paralellism thus no race condition to protect against.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Manuel Lauss &lt;manuel.lauss@googlemail.com&gt;
</content>
</entry>
</feed>
