<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/mips/alchemy/devboards, branch linux-4.11.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.11.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.11.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2017-02-21T22:21:11Z</updated>
<entry>
<title>Merge tag 'mips_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips</title>
<updated>2017-02-21T22:21:11Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2017-02-21T22:21:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0f002fddbe150ec3f2afce3fc09de5bda3096c72'/>
<id>urn:sha1:0f002fddbe150ec3f2afce3fc09de5bda3096c72</id>
<content type='text'>
Pull MIPS updates from James Hogan:
 "Here's the main MIPS pull request for 4.11.

  It contains a few new features such as IRQ stacks, cacheinfo support,
  and KASLR for Octeon CPUs, and a variety of smaller improvements and
  fixes including devicetree additions, kexec cleanups, microMIPS stack
  unwinding fixes, and a bunch of build fixes to clean up continuous
  integration builds.

  Its all been in linux-next for at least a couple of days, most of it
  far longer.

  Miscellaneous:
   - Add IRQ stacks
   - Add cacheinfo support
   - Add "uzImage.bin" zboot target
   - Unify performance counter definitions
   - Export various (mainly assembly) symbols alongside their
     definitions
   - Audit and remove unnecessary uses of module.h

  kexec &amp; kdump:
   - Lots of improvements and fixes
   - Add correct copy_regs implementations
   - Add debug logging of new kernel information

  Security:
   - Use Makefile.postlink to insert relocations into vmlinux
   - Provide plat_post_relocation hook (used for Octeon KASLR)
   - Add support for tuning mmap randomisation
   - Relocate DTB

  microMIPS:
   - A load of unwind fixes
   - Add some missing .insn to fix link errors

  MIPSr6:
   - Fix MULTU/MADDU/MSUBU sign extension in r2 emulation
   - Remove r2_emul_return and use ERETNC unconditionally on MIPSr6
   - Allow pre-r6 emulation on SMP MIPSr6 kernels

  Cache management:
   - Treat physically indexed dcache as non-aliasing
   - Add return errors to protected cache ops for KVM
   - CM3: Ensure L1 &amp; L2 cache ECC checking matches
   - CM3: Indicate inclusive caches
   - I6400: Treat dcache as physically indexed

  Memory management:
   - Ensure bootmem doesn't corrupt reserved memory
   - Export some TLB exception generation functions for KVM

  OF:
   - NULL check initial_boot_params before use in of_scan_flat_dt()
   - Fix unaligned access in of_alias_scan()

  SMP:
   - CPS: Don't BUG if a CPU fails to start

  Other fixes:
   - Fix longstanding 64-bit IP checksum carry bug
   - Fix KERN_CONT fallout in cpu-bugs64.c and sync-r4k.c
   - Update defconfigs for NF_CT_PROTO_DCCP, DPLITE,
     CPU_FREQ_STAT,SCSI_DH changes
   - Disable certain builtin compiler options, stack-check (whole
     kernel), asynchronous-unwind-tables (VDSO).
   - A bunch of build fixes from kernelci.org testing
   - Various other minor cleanups &amp; corrections

  BMIPS:
   - Migrate interrupts during bmips_cpu_disable
   - BCM47xx: Add Luxul devices
   - BCM47xx: Fix Asus WL-500W button inversion
   - BCM7xxx: Add SPI device nodes

  Generic (multiplatform):
   - Add kexec DTB passing
   - Fix big endian
   - Add cpp_its_S in ksym_dep_filter to silence build warning

  IP22:
   - Reformat inline assembler code to modern standards
   - Fix binutils 2.25 build error

  IP27:
   - Fix duplicate CAC_BASE definition build error
   - Disable qlge driver to workaround broken compiler

  Lantiq:
   - Refresh defconfig and activate more drivers
   - Lock DMA register access
   - Fix cascading IRQ setup
   - Fix build of VPE loader
   - xway: Fix ethernet packet header corruption over reboot

  Loongson1
   - Add watchdog support
   - 1B: Reduce DEFAULT_MEMSIZE to 64MB
   - 1B: Change OSC clock name to match rest of kernel
   - 1C: Remove ARCH_WANT_OPTIONAL_GPIOLIB

  Octeon:
   - Add KASLR support
   - Support Octeon III USB controller
   - Fix large copy_from_user corner case
   - Enable devtmpfs in defconfig

  Netlogic:
   - Fix non-default XLR build error due to netlogic,xlp-pic code
   - Fix assembler warning from smpboot.S

  pic32mzda:
   - Fix linker error when early printk is disabled

  Pistachio:
   - Add base device tree
   - Add Ci40 "Marduk" device tree

  Ralink:
   - Support raw appended DTB
   - Add missing I2C &amp; I2S clocks
   - Add missing pinmux and fix pinmux function name typo
   - Add missing clk_round_rate()
   - Clean up prom_init()
   - MT7621: Set SoC type
   - MT7621: Support highmem

  TXx9:
   - Modernize printing of kernel messages and resolve KERN_CONT fallout
   - 7segled: use permission-specific DEVICE_ATTR variants

  XilFPGA:
   - Add IRQ controller and UART IRQ
   - Add AXI I2C and emaclite to DT &amp; defconfig"

* tag 'mips_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (148 commits)
  MIPS: VDSO: Explicitly use -fno-asynchronous-unwind-tables
  MIPS: BCM47XX: Fix button inversion for Asus WL-500W
  MIPS: DTS: Add img directory to Makefile
  MIPS: ip27: Disable qlge driver in defconfig
  MIPS: pic32mzda: Fix linker error for pic32_get_pbclk()
  MIPS: Lantiq: Keep ethernet enabled during boot
  MIPS: OCTEON: Fix copy_from_user fault handling for large buffers
  MIPS: Fix special case in 64 bit IP checksumming.
  MIPS: OCTEON: Enable DEVTMPFS
  MIPS: lantiq: Set physical_memsize
  MIPS: sysmips: Remove duplicated include from syscall.c
  Kbuild: Add cpp_its_S in ksym_dep_filter
  MIPS: Audit and remove any unnecessary uses of module.h
  MIPS: Unify perf counter register definitions
  MIPS: Disable stack checks on MIPS kernels
  MIPS: OCTEON: Platform support for OCTEON III USB controller
  MIPS: Lantiq: Fix cascaded IRQ setup
  MIPS: sync-r4k: Fix KERN_CONT fallout
  MIPS: IRQ Stack: Fix erroneous jal to plat_irq_dispatch
  MIPS: Fix distclean with Makefile.postlink
  ...
</content>
</entry>
<entry>
<title>MIPS: Audit and remove any unnecessary uses of module.h</title>
<updated>2017-02-14T09:00:25Z</updated>
<author>
<name>Paul Gortmaker</name>
</author>
<published>2017-01-29T02:05:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=26dd3e4ff9ac1aa576c97d23d7425d2544dbc5bf'/>
<id>urn:sha1:26dd3e4ff9ac1aa576c97d23d7425d2544dbc5bf</id>
<content type='text'>
Historically a lot of these existed because we did not have
a distinction between what was modular code and what was providing
support to modules via EXPORT_SYMBOL and friends.  That changed
when we forked out support for the latter into the export.h file.

This means we should be able to reduce the usage of module.h
in code that is obj-y Makefile or bool Kconfig.  In the case of
some code where it is modular, we can extend that to also include
files that are building basic support functionality but not related
to loading or registering the final module; such files also have
no need whatsoever for module.h

The advantage in removing such instances is that module.h itself
sources about 15 other headers; adding significantly to what we feed
cpp, and it can obscure what headers we are effectively using.

Since module.h might have been the implicit source for init.h
(for __init) and for export.h (for EXPORT_SYMBOL) we consider each
instance for the presence of either and replace/add as needed.

Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

Build coverage of all the mips defconfigs revealed the module.h
header was masking a couple of implicit include instances, so
we add the appropriate headers there.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Cc: David Daney &lt;david.daney@cavium.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: "Steven J. Hill" &lt;steven.hill@cavium.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15131/
[james.hogan@imgtec.com: Preserve sort order where it already exists]
Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Don't rely on public mmc header to include interrupt.h</title>
<updated>2017-02-13T12:20:18Z</updated>
<author>
<name>Ulf Hansson</name>
</author>
<published>2017-01-13T13:14:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d815cf8f33ef87bb2696febeb7b1592a77cf1514'/>
<id>urn:sha1:d815cf8f33ef87bb2696febeb7b1592a77cf1514</id>
<content type='text'>
The MIPS Alchemy db1300 dev board depends on interrupt.h. Explicitly
include it instead of relying on the public mmc header host.h.

Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>pcmcia: db1xxx_ss: fix last irq_to_gpio user</title>
<updated>2016-03-29T20:48:53Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2016-03-02T09:34:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e34b6fcf9b09ec9d93503edd5f81489791ffd602'/>
<id>urn:sha1:e34b6fcf9b09ec9d93503edd5f81489791ffd602</id>
<content type='text'>
remove the usage of removed irq_to_gpio() function.  On pre-DB1200
boards, pass the actual carddetect GPIO number instead of the IRQ,
because we need the gpio to actually test card status (inserted or
not) and can get the irq number with gpio_to_irq() instead.

Tested on DB1300 and DB1500, this patch fixes PCMCIA on the DB1500,
which used irq_to_gpio().

Fixes: 832f5dacfa0b ("MIPS: Remove all the uses of custom gpio.h")
Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-pcmcia@lists.infradead.org
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Cc: stable@vger.kernel.org	# v4.3+
Patchwork: https://patchwork.linux-mips.org/patch/12747/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>mips: nand: make use of mtd_to_nand() where appropriate</title>
<updated>2015-12-08T21:03:07Z</updated>
<author>
<name>Boris BREZILLON</name>
</author>
<published>2015-12-01T11:03:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b1afda0e336f3b65e1dc765e3405d3231d9782fe'/>
<id>urn:sha1:b1afda0e336f3b65e1dc765e3405d3231d9782fe</id>
<content type='text'>
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd-&gt;priv field. Update all MIPS specific implementations to use this
helper.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;
Acked-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
Signed-off-by: Brian Norris &lt;computersforpeace@gmail.com&gt;
</content>
</entry>
<entry>
<title>genirq: Remove irq argument from irq flow handlers</title>
<updated>2015-09-16T13:47:51Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2015-09-14T08:42:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bd0b9ac405e1794d72533c3d487aa65b6b955a0c'/>
<id>urn:sha1:bd0b9ac405e1794d72533c3d487aa65b6b955a0c</id>
<content type='text'>
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Cc: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Remove all the uses of custom gpio.h</title>
<updated>2015-09-03T10:08:02Z</updated>
<author>
<name>Alban Bedel</name>
</author>
<published>2015-08-02T16:30:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=832f5dacfa0bb081a3b3b979a36a132b28ffacf3'/>
<id>urn:sha1:832f5dacfa0bb081a3b3b979a36a132b28ffacf3</id>
<content type='text'>
Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
machines, and each machine type provides its own gpio.h. However
only a handful really implement the GPIO API, most just forward
everythings to gpiolib.

The Alchemy machine is notable as it provides a system to allow
implementing the GPIO API at the board level. But it is not used by
any board currently supported, so it can also be removed.

For most machine types we can just remove the custom gpio.h, as well
as the custom wrappers if some exists. Some of the code found in
the wrappers must be moved to the respective GPIO driver.

A few more fixes are need in some drivers as they rely on linux/gpio.h
to provides some machine specific definitions, or used asm/gpio.h
instead of linux/gpio.h for the gpio API.

Signed-off-by: Alban Bedel &lt;albeu@free.fr&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
Cc: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Cc: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;
Cc: Tejun Heo &lt;tj@kernel.org&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
Cc: Florian Fainelli &lt;florian@openwrt.org&gt;
Cc: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Daniel Walter &lt;dwalter@google.com&gt;
Cc: Sergey Ryazanov &lt;ryazanov.s.a@gmail.com&gt;
Cc: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Jiri Kosina &lt;jkosina@suse.cz&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Varka Bhadram &lt;varkabhadram@gmail.com&gt;
Cc: Masanari Iida &lt;standby24x7@gmail.com&gt;
Cc: Tomi Valkeinen &lt;tomi.valkeinen@ti.com&gt;
Cc: Michael Buesch &lt;m@bues.ch&gt;
Cc: abdoulaye berthe &lt;berthe.ab@gmail.com&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-ide@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10828/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: alchemy: Remove pointless irqdisable/enable</title>
<updated>2015-08-26T13:23:30Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2015-07-13T20:46:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e0288a0a7bb8b28787453cb96f7aad272086def1'/>
<id>urn:sha1:e0288a0a7bb8b28787453cb96f7aad272086def1</id>
<content type='text'>
bcsr_csc_handler() is a cascading interrupt handler. It has a
disable_irq_nosync()/enable_irq() pair around the generic_handle_irq()
call. The value of this disable/enable is zero because its a complete
noop:

disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.

Remove it.

[ralf@linux-mips.org: Fold in followup fix from Thomas Gleixner.]

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Cc: LKML &lt;linux-kernel@vger.kernel.org&gt;
Cc: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/10702/
Patchwork: https://patchwork.linux-mips.org/patch/10708/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: DB1300: Add touch penirq support</title>
<updated>2014-09-22T11:35:47Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-08-20T19:36:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c64bb5f0c26f6ea791270852217b7cb28553ba76'/>
<id>urn:sha1:c64bb5f0c26f6ea791270852217b7cb28553ba76</id>
<content type='text'>
wire up the WM9713 pendown irq support.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7563/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: DB1xxx: Explicitly set 50MHz clock for I2C/SPI units.</title>
<updated>2014-09-22T11:35:47Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2014-08-20T19:36:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c02a505e5a7787ee7aa871152ba571e6c1d1dc62'/>
<id>urn:sha1:c02a505e5a7787ee7aa871152ba571e6c1d1dc62</id>
<content type='text'>
Add an explicit call to set the desired rate to get the correct
clock routing for the PSC clocks.  It wasn't broken before, but
now it's less affected by bootloader changes.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc: Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7554/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
