kernel.git/arch/mips/alchemy/common, branch linux-3.18.y

MIPS: Alchemy: Fix cpu clock calculation

2015-03-06T22:52:54Z

commit 69e4e63ec816a7e22cc3aa14bc7ef4ac734d370c upstream. The current code uses bits 0-6 of the sys_cpupll register to calculate core clock speed. However this is only valid on Au1300, on all earlier models the hardware only uses bits 0-5 to generate core clock. This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll is set as well, which ultimately lead the code to calculate a bogus cpu core clock and also uart base clock down the line. Signed-off-by: Manuel Lauss Reported-by: John Crispin Tested-by: Bruno Randolf Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/9279/ Signed-off-by: Ralf Baechle Signed-off-by: Greg Kroah-Hartman

MIPS: Alchemy: remove old clock support

2014-07-30T12:12:00Z

With the clock framework in place, remove unused functions and bits, and drop the CLK_IGNORE_UNUSED flag, which is now unneeded. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7473/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: usb: use clk framework

2014-07-30T12:09:21Z

Add use of the common clock framework to set and enable the 48MHz clock source for the onchip OHCI and UDC blocks. Tested on a DB1500. (Au1200 and Au1300 use an external 48MHz crystal). Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7467/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: platform: use clk framework for uarts

2014-07-30T12:09:02Z

Use the clock framework to get the rate of the peripheral clock. Remove the now obsolete get_uart_baud_base function. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7468/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: clock framework integration of onchip clocks

2014-07-30T12:08:42Z

This patch introduces common clock framework integration for all configurable on-chip clocks on Alchemy chips: - 2 or 3 PLLs which generate integer multiples of the root rate 12MHz, - 6 dividers which take one of the 3 PLLs as input and divide their rate by either multiples of 2 or 1 (Au1300). - another bank of up to 6 muxes which take either one of the 6 above dividers or one of the PLLs directly and divide their rate further by 1, 2, 3 or 4. - a few other sources which are used by onchip peripherals and are informational. This implementation will take the clock tree as it was set up by boot firmware: all in-kernel boards should continue to work without having to set up the clock tree in board code. CLK_IGNORE_DISABLED will be removed once all drivers have been converted. Signed-off-by: Manuel Lauss Cc: Mike Turquette Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7466/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: remove au_read/write/sync

2014-07-30T11:56:34Z

replace au_read/write/sync with __raw_read/write and wmb. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7465/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: add helpers to access static memory ctrl registers.

2014-07-30T11:53:52Z

This patch changes the static memory controller registers to offsets from base, prefixes them with AU1000_ to avoid silent failures due to changed addresses and introduces helpers to access them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7463/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: introduce helpers to access SYS register block.

2014-07-30T11:53:28Z

This patch changes all absolute SYS_XY registers to offsets from the SYS block base, prefixes them with AU1000 to avoid silent failures due to changed addresses, and introduces helper functions to read/write them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/7464/ Signed-off-by: Ralf Baechle

MIPS: Alchemy: Default to noncoherent IO on Au1200 AB

2014-05-28T09:04:48Z

CONFIG_DMA_COHERENT is no longer set; default to noncoherent io on Au1200 revision AB to make USB work. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/6745/ Signed-off-by: Ralf Baechle

MIPS: Fix gigaton of warning building with microMIPS.

2014-03-31T16:17:12Z

With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III mode through .set mips3 results in *lots* of warnings like {standard input}: Assembler messages: {standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension during a kernel build. Fixed by using .set arch=r4000 instead. This breaks support for building the kernel with binutils 2.13 which was supported for 32 bit kernels only anyway and 2.14 which was a bad vintage for MIPS anyway. Signed-off-by: Ralf Baechle