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<title>kernel.git/arch/mips/alchemy/common, branch linux-3.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.10.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.10.y'/>
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<updated>2013-05-21T23:34:27Z</updated>
<entry>
<title>MIPS: Idle: Consolidate all declarations in &lt;asm/idle.h&gt;.</title>
<updated>2013-05-21T23:34:27Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2013-05-21T14:59:19Z</published>
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<id>urn:sha1:bdc92d74e0ec95a8101447467c25f015105f2e5a</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2013-01-22T11:59:30Z</published>
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<id>urn:sha1:7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully</title>
<updated>2012-12-27T15:27:35Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2012-12-17T06:14:08Z</published>
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<id>urn:sha1:8e0d7372f595c254d83316fba1530164010f7b33</id>
<content type='text'>
Now that the r4k timer is registered no matter what, bump the rating of
the Alchemy 32kHz timer so that it gets used when it is working,
and fall back on the r4k when it isn't.

This fixes a timer-related hang on platform with a working 32kHz timer
(the better rated c0 timer stops while executing 'wait' leading to (almost)
eternal sleep) and an oops on boot on platforms without a working 32kHz
timer (due to double registration of the r4k timer).

Signed-off-by: Manuel Lauss &lt;manuel.lauss@gmail.com&gt;
Cc:  Linux-MIPS &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/4728/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>USB: move common alchemy USB routines to arch/mips/alchemy/common.c</title>
<updated>2012-10-22T18:29:12Z</updated>
<author>
<name>Florian Fainelli</name>
</author>
<published>2012-10-08T13:11:40Z</published>
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<id>urn:sha1:216d0fded417d26a19049038788813af126b9d66</id>
<content type='text'>
A previous patch converted the Alchemy platform to use the OHCI and EHCI
platform drivers. As a result, all the common logic to handle USB present in
drivers/usb/host/alchemy-common.c has no reason to remain here, so we move it
to arch/mips/alchemy/common/usb.c which is a more appropriate place. This
change was suggested by Manuel Lauss.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Acked-by: Alan Stern &lt;stern@rowland.harvard.edu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: use the OHCI platform driver</title>
<updated>2012-10-22T18:29:04Z</updated>
<author>
<name>Florian Fainelli</name>
</author>
<published>2012-10-08T13:11:38Z</published>
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<id>urn:sha1:e223a4cca70fb6d3954abab7e96a5f54d64d79d4</id>
<content type='text'>
Convert the Alchemy platform to register the ohci-platform driver, now that
the ohci-platform driver properly handles the specific ohci-au1xxx resume
from suspend case.

This also greatly simplifies the power_{on,off} callbacks and make them
work on platform device id instead of checking the OHCI controller base
address like what was done in ohci-au1xxx.c.

Impacted defconfigs are also updated accordingly to select the OHCI platform
driver.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Acked-by: Alan Stern &lt;stern@rowland.harvard.edu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: use the ehci platform driver</title>
<updated>2012-10-22T18:23:25Z</updated>
<author>
<name>Florian Fainelli</name>
</author>
<published>2012-10-08T13:11:22Z</published>
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<id>urn:sha1:2be350fafe3fe09765026f41d250dc5d3f000b1a</id>
<content type='text'>
Use the ehci platform driver power_{on,suspend,off} callbacks to perform the
USB block gate enabling/disabling as what the ehci-au1xxx.c driver does.
Update the db1200 and db1300 defconfigs to now select the EHCI platform
driver.

Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Acked-by: Alan Stern &lt;stern@rowland.harvard.edu&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Use kmemdup rather than duplicating its implementation</title>
<updated>2012-07-23T12:55:55Z</updated>
<author>
<name>Thomas Meyer</name>
</author>
<published>2011-11-17T22:43:40Z</published>
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<id>urn:sha1:a6196bab646537f594ef269bf9e1c92fe0e165a6</id>
<content type='text'>
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.

Signed-off-by: Thomas Meyer &lt;thomas@m3y3r.de&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3058/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Alchemy: Increase minimum timeout for 32kHz timer.</title>
<updated>2012-02-20T17:33:18Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2011-12-20T16:37:29Z</published>
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<id>urn:sha1:8e3657903589f5a5a36a95f660a33e137b3da6f5</id>
<content type='text'>
Since a clocksource change post 3.2-rc1, tasks on my DB1500 board
hang after random amounts of time (from a few minutes to a few hours),
regardless of load.  Debugging showed that the compare-match register
value is a few seconds lower than the current counter value.

The minimum value of 8 was initialy determined by a trial-and-error
approach.  Currently it is sufficient for all Alchemys (without PCI
apparently), independent of CPU clock;  only the DB1500 and DB1550
boards experience these timer-related tasks hangs now.

This patch increases the minimum timeout by 1 (to 9 counter ticks)
which seems sufficient since the systems are still working perfectly
fine after over 24 hours.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@googlemail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3214/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'next/alchemy' into mips-for-linux-next</title>
<updated>2012-01-11T14:42:10Z</updated>
<author>
<name>Ralf Baechle</name>
</author>
<published>2012-01-11T14:42:10Z</published>
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<id>urn:sha1:7a5c3b8c5c27211846efe7029a3d2ee7087425e3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.</title>
<updated>2011-12-08T10:42:16Z</updated>
<author>
<name>Manuel Lauss</name>
</author>
<published>2011-12-08T10:42:16Z</published>
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<id>urn:sha1:3eab8095ef1658f5cd4927a0224b1214329cb348</id>
<content type='text'>
With a generic plat_irq_dispatch (for Alchemy at least) code for both
interrupt controller types can coexist in a single kernel image and be
autodetected at runtime.

Signed-off-by: Manuel Lauss &lt;manuel.lauss@googlemail.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2935/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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